Lines Matching refs:mtu3_readl
142 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_stall_set()
300 value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in handle_test_mode()
339 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL); in ep0_handle_feature_dev()
354 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL); in ep0_handle_feature_dev()
450 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF); in handle_standard_request()
512 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_rx_state()
522 count = mtu3_readl(mbase, U3D_RXCOUNT0); in ep0_rx_state()
588 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_tx_state()
592 mtu3_readl(mtu->mac_base, U3D_EP0CSR)); in ep0_tx_state()
601 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_read_setup()
602 count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0); in ep0_read_setup()
672 (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS) in ep0_handle_setup()
693 int_status = mtu3_readl(mbase, U3D_EPISR); in mtu3_ep0_isr()
694 int_status &= mtu3_readl(mbase, U3D_EPIER); in mtu3_ep0_isr()
705 csr = mtu3_readl(mbase, U3D_EP0CSR); in mtu3_ep0_isr()
712 csr = mtu3_readl(mbase, U3D_EP0CSR); in mtu3_ep0_isr()
749 len = mtu3_readl(mbase, U3D_RXCOUNT0); in mtu3_ep0_isr()
808 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_queue()