Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance
1271 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1284 max_limits->sclk, in btc_adjust_clock_combinations()1291 max_limits->mclk, in btc_adjust_clock_combinations()2100 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2112 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2114 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2117 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2118 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2119 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2120 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
48 const struct radeon_clock_and_voltage_limits *max_limits,
791 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()806 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()815 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()816 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
800 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local825 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()827 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()831 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()832 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()833 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()834 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3934 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3938 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3940 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2972 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3027 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3029 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3037 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3038 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3039 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3040 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()3041 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()3042 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()3043 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
2152 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2163 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2167 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2286 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2288 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3144 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local3160 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()3168 max_limits->mclk) in vega10_apply_state_adjust_rules()3170 max_limits->mclk; in vega10_apply_state_adjust_rules()3172 max_limits->sclk) in vega10_apply_state_adjust_rules()3174 max_limits->sclk; in vega10_apply_state_adjust_rules()3191 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()3192 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3208 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()3233 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()[all …]
2895 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local2910 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()2917 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()2918 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()2919 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()2920 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()2929 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()2930 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()2945 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()2972 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()[all …]
1686 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()1689 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()1690 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
2744 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()2747 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()2748 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()
3288 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument3301 max_limits->sclk, in btc_adjust_clock_combinations()3308 max_limits->mclk, in btc_adjust_clock_combinations()3431 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3486 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3488 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3496 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3497 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3498 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3499 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()[all …]
2217 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2228 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2232 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2351 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2353 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
