2972 	struct radeon_clock_and_voltage_limits *max_limits;  in si_apply_state_adjust_rules()  local
3027 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_apply_state_adjust_rules()
3029 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;  in si_apply_state_adjust_rules()
3037 			if (ps->performance_levels[i].mclk > max_limits->mclk)  in si_apply_state_adjust_rules()
3038 				ps->performance_levels[i].mclk = max_limits->mclk;  in si_apply_state_adjust_rules()
3039 			if (ps->performance_levels[i].sclk > max_limits->sclk)  in si_apply_state_adjust_rules()
3040 				ps->performance_levels[i].sclk = max_limits->sclk;  in si_apply_state_adjust_rules()
3041 			if (ps->performance_levels[i].vddc > max_limits->vddc)  in si_apply_state_adjust_rules()
3042 				ps->performance_levels[i].vddc = max_limits->vddc;  in si_apply_state_adjust_rules()
3043 			if (ps->performance_levels[i].vddci > max_limits->vddci)  in si_apply_state_adjust_rules()
3044 				ps->performance_levels[i].vddci = max_limits->vddci;  in si_apply_state_adjust_rules()
3149 		btc_adjust_clock_combinations(rdev, max_limits,  in si_apply_state_adjust_rules()
3157 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3160 						   max_limits->vddci, &ps->performance_levels[i].vddci);  in si_apply_state_adjust_rules()
3163 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3166 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3171 					      max_limits->vddc, max_limits->vddci,  in si_apply_state_adjust_rules()