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/Linux-v5.4/drivers/gpu/drm/radeon/
Drv730_dpm.c246 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
249 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
253 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
254 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
299 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
300 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
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Drv740_dpm.c334 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
335 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
342 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
343 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
373 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
374 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
375 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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Dcypress_dpm.c776 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
783 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
790 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
795 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
796 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
797 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
800 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
801 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
804 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
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Dsumo_dpm.c347 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
411 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
670 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
762 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
844 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
845 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
862 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
863 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1053 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1054 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
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Drv770_dpm.c289 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
295 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
309 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
311 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
685 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
692 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
699 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
704 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
705 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
706 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
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Dtrinity_dpm.c850 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
970 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
971 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
984 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
985 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1332 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1355 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1410 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1411 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1417 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
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Dni_dpm.c1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1708 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1711 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state()
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Dsi_dpm.c2318 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2319 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2320 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2321 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2322 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2372 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
2373 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2374 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()
2375 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values()
2376 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values()
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/Linux-v5.4/drivers/video/backlight/
Dpwm_bl.c27 unsigned int *levels; member
98 if (pb->levels) in compute_duty_cycle()
99 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
203 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default()
204 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default()
205 if (!data->levels) in pwm_backlight_brightness_default()
216 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default()
265 size_t size = sizeof(*data->levels) * data->max_brightness; in pwm_backlight_parse_dt()
268 data->levels = devm_kzalloc(dev, size, GFP_KERNEL); in pwm_backlight_parse_dt()
269 if (!data->levels) in pwm_backlight_parse_dt()
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/Linux-v5.4/arch/powerpc/platforms/powernv/
Dpci-ioda-tce.c53 unsigned long size, unsigned int levels);
190 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument
195 if (levels) { in pnv_pci_ioda2_table_do_free_pages()
206 levels - 1); in pnv_pci_ioda2_table_do_free_pages()
230 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument
241 --levels; in pnv_pci_ioda2_table_do_alloc_pages()
242 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages()
249 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages()
264 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument
276 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages()
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/Linux-v5.4/arch/riscv/kernel/
Dcacheinfo.c24 int levels = 0, leaves = 0, level; in __init_cache_level() local
33 levels = 1; in __init_cache_level()
43 if (level <= levels) in __init_cache_level()
51 levels = level; in __init_cache_level()
55 this_cpu_ci->num_levels = levels; in __init_cache_level()
67 int levels = 1, level = 1; in __populate_cache_leaves() local
84 if (level <= levels) in __populate_cache_leaves()
92 levels = level; in __populate_cache_leaves()
/Linux-v5.4/arch/mips/kernel/
Dcacheinfo.c24 int levels = 0, leaves = 0; in __init_cache_level() local
31 levels += 1; in __init_cache_level()
39 levels++; in __init_cache_level()
44 levels++; in __init_cache_level()
48 this_cpu_ci->num_levels = levels; in __init_cache_level()
/Linux-v5.4/Documentation/scheduler/
Dsched-nice-design.rst6 nice-levels implementation in the new Linux scheduler.
8 Nice levels were always pretty weak under Linux and people continuously
16 In the O(1) scheduler (in 2003) we changed negative nice levels to be
58 To sum it up: we always wanted to make nice levels more consistent, but
83 nice levels were not 'punchy enough', so lots of people had to resort to
90 To address the first complaint (of nice levels being not "punchy"
92 (and granularity was made a separate concept from nice levels) and thus
98 To address the second complaint (of nice levels not being consistent),
100 tasks, regardless of their absolute nice levels. So on the new
104 levels were changed to be "multiplicative" (or exponential) - that way
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/Linux-v5.4/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.txt17 - brightness-levels: Array of distinct brightness levels. Typically these
24 array defined by the "brightness-levels" property).
26 of brightness-levels table. This way a high
40 brightness-levels = <0 4 8 16 32 64 128 255>;
55 brightness-levels = <0 2048 4096 8192 16384 65535>;
/Linux-v5.4/drivers/acpi/
Dacpi_video.c238 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
251 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
282 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
301 level = video->brightness->levels[state - 1]; in video_set_cur_state()
319 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
326 *levels = NULL; in acpi_video_device_lcd_query_levels()
338 *levels = obj; in acpi_video_device_lcd_query_levels()
364 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level()
580 level = device->brightness->levels[bqc_value + in acpi_video_bqc_value_to_level()
617 if (device->brightness->levels[i] == *level) { in acpi_video_device_lcd_get_level_current()
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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.c2415 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2416 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2417 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2418 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2419 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2468 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
2469 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2470 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()
2471 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values()
2472 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values()
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/Linux-v5.4/drivers/thermal/intel/int340x_thermal/
Dint3406_thermal.c60 acpi_level = d->br->levels[d->upper_limit - state]; in int3406_thermal_set_cur_state()
83 if (acpi_level <= d->br->levels[index]) in int3406_thermal_get_cur_state()
115 d->lower_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
120 d->upper_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
/Linux-v5.4/Documentation/ABI/testing/
Dsysfs-class-backlight-adp55204 The backlight brightness control operates at three different levels for the
16 is at one of the three levels (daylight, office or dark). This
29 one of the three levels (daylight, office or dark). This is an
Dsysfs-class-backlight-adp88604 The backlight brightness control operates at three different levels for the
38 is at one of the three levels (daylight, office or dark). This
52 one of the three levels (daylight, office or dark). This is an
/Linux-v5.4/arch/arm64/include/asm/
Dkvm_arm.h184 #define VTCR_EL2_LVLS_TO_SL0(levels) \ argument
185 ((VTCR_EL2_TGRAN_SL0_BASE - (4 - (levels))) << VTCR_EL2_SL0_SHIFT)
257 #define ARM64_VTTBR_X(ipa, levels) ((ipa) - ((levels) * (PAGE_SHIFT - 3))) argument
/Linux-v5.4/Documentation/arm64/
Dmemory.rst8 Linux kernel. The architecture allows up to 4 levels of translation
9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
11 AArch64 Linux uses either 3 levels or 4 levels of translation tables
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
29 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
48 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
/Linux-v5.4/Documentation/ABI/
DREADME3 everchanging nature of Linux, and the differing maturity levels, these
6 We have four different levels of ABI stability, as shown by the four
7 different subdirectories in this location. Interfaces may change levels
10 The different levels of stability are:
61 How things move between levels:
/Linux-v5.4/Documentation/devicetree/bindings/hwmon/
Daspeed-pwm-tacho.txt34 For PWM port can be configured cooling-levels to create cooling device.
42 - cooling-levels: PWM duty cycle values in a range from 0 to 255
65 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
Dnpcm750-pwm-fan.txt28 For PWM channel can be configured cooling-levels to create cooling device.
43 - cooling-levels: PWM duty cycle values in a range from 0 to 255
73 cooling-levels = <127 255>;
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c1018 struct SMU73_Discrete_GraphicsLevel *levels = in fiji_populate_all_graphic_levels() local
1029 &levels[i]); in fiji_populate_all_graphic_levels()
1035 levels[i].DeepSleepDivId = 0; in fiji_populate_all_graphic_levels()
1039 levels[0].EnabledForActivity = 1; in fiji_populate_all_graphic_levels()
1042 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1056 levels[i].pcieDpmLevel = in fiji_populate_all_graphic_levels()
1081 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1084 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1087 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1090 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_graphic_levels()
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