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Searched refs:irq_mask (Results 1 – 25 of 604) sorted by relevance

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/Linux-v5.4/arch/arm/mach-pxa/
Dpxa_cplds_irqs.c29 unsigned int irq_mask; member
41 pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; in cplds_irq_handler()
57 fpga->irq_mask &= ~bit; in cplds_irq_mask()
58 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_irq_mask()
70 fpga->irq_mask |= bit; in cplds_irq_unmask()
71 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_irq_unmask()
77 .irq_mask = cplds_irq_mask,
102 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_resume()
134 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_probe()
/Linux-v5.4/arch/mips/sgi-ip27/
Dip27-irq.c27 u64 *irq_mask[2]; member
56 __raw_writeq(mask[0], hd->irq_mask[0]); in enable_hub_irq()
57 __raw_writeq(mask[1], hd->irq_mask[1]); in enable_hub_irq()
66 __raw_writeq(mask[0], hd->irq_mask[0]); in disable_hub_irq()
67 __raw_writeq(mask[1], hd->irq_mask[1]); in disable_hub_irq()
79 hd->irq_mask[0] = REMOTE_HUB_PTR(nasid, PI_INT_MASK0_A); in setup_hub_mask()
80 hd->irq_mask[1] = REMOTE_HUB_PTR(nasid, PI_INT_MASK1_A); in setup_hub_mask()
82 hd->irq_mask[0] = REMOTE_HUB_PTR(nasid, PI_INT_MASK0_B); in setup_hub_mask()
83 hd->irq_mask[1] = REMOTE_HUB_PTR(nasid, PI_INT_MASK1_B); in setup_hub_mask()
110 .irq_mask = disable_hub_irq,
/Linux-v5.4/arch/alpha/kernel/
Dsys_rx164.c41 volatile unsigned int *irq_mask; in rx164_update_irq_hw() local
43 irq_mask = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x74); in rx164_update_irq_hw()
44 *irq_mask = mask; in rx164_update_irq_hw()
46 *irq_mask; in rx164_update_irq_hw()
64 .irq_mask = rx164_disable_irq,
/Linux-v5.4/drivers/gpio/
Dgpio-104-idi-48.c49 unsigned char irq_mask[6]; member
148 idi48gpio->irq_mask[boundary] &= ~mask; in idi_48_irq_mask()
150 if (!idi48gpio->irq_mask[boundary]) { in idi_48_irq_mask()
180 prev_irq_mask = idi48gpio->irq_mask[boundary]; in idi_48_irq_unmask()
182 idi48gpio->irq_mask[boundary] |= mask; in idi_48_irq_unmask()
212 .irq_mask = idi_48_irq_mask,
222 unsigned long irq_mask; in idi_48_irq_handler() local
245 irq_mask = idi48gpio->irq_mask[boundary]; in idi_48_irq_handler()
247 for_each_set_bit(bit_num, &irq_mask, 8) { in idi_48_irq_handler()
Dgpio-104-dio-48e.c53 unsigned char irq_mask; member
299 dio48egpio->irq_mask &= ~BIT(0); in dio48e_irq_mask()
301 dio48egpio->irq_mask &= ~BIT(1); in dio48e_irq_mask()
303 if (!dio48egpio->irq_mask) in dio48e_irq_mask()
323 if (!dio48egpio->irq_mask) { in dio48e_irq_unmask()
330 dio48egpio->irq_mask |= BIT(0); in dio48e_irq_unmask()
332 dio48egpio->irq_mask |= BIT(1); in dio48e_irq_unmask()
354 .irq_mask = dio48e_irq_mask,
363 const unsigned long irq_mask = dio48egpio->irq_mask; in dio48e_irq_handler() local
366 for_each_set_bit(gpio, &irq_mask, 2) in dio48e_irq_handler()
Dgpio-104-idio-16.c46 unsigned long irq_mask; member
153 idio16gpio->irq_mask &= ~mask; in idio_16_irq_mask()
155 if (!idio16gpio->irq_mask) { in idio_16_irq_mask()
169 const unsigned long prev_irq_mask = idio16gpio->irq_mask; in idio_16_irq_unmask()
172 idio16gpio->irq_mask |= mask; in idio_16_irq_unmask()
196 .irq_mask = idio_16_irq_mask,
207 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) in idio_16_irq_handler()
Dgpio-pcie-idio-24.c96 unsigned long irq_mask; member
368 idio24gpio->irq_mask &= BIT(bit_offset); in idio_24_irq_mask()
369 new_irq_mask = idio24gpio->irq_mask >> bank_offset; in idio_24_irq_mask()
397 prev_irq_mask = idio24gpio->irq_mask >> bank_offset; in idio_24_irq_unmask()
398 idio24gpio->irq_mask |= BIT(bit_offset); in idio_24_irq_unmask()
427 .irq_mask = idio_24_irq_mask,
437 unsigned long irq_mask; in idio_24_irq_handler() local
452 irq_mask = idio24gpio->irq_mask & irq_status; in idio_24_irq_handler()
454 for_each_set_bit(gpio, &irq_mask, chip->ngpio - 24) in idio_24_irq_handler()
Dgpio-pci-idio-16.c57 unsigned long irq_mask; member
218 idio16gpio->irq_mask &= ~mask; in idio_16_irq_mask()
220 if (!idio16gpio->irq_mask) { in idio_16_irq_mask()
234 const unsigned long prev_irq_mask = idio16gpio->irq_mask; in idio_16_irq_unmask()
237 idio16gpio->irq_mask |= mask; in idio_16_irq_unmask()
261 .irq_mask = idio_16_irq_mask,
283 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) in idio_16_irq_handler()
Dgpio-ws16c48.c48 unsigned long irq_mask; member
250 port_state = ws16c48gpio->irq_mask >> (8*port); in ws16c48_irq_ack()
275 ws16c48gpio->irq_mask &= ~mask; in ws16c48_irq_mask()
278 outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port); in ws16c48_irq_mask()
299 ws16c48gpio->irq_mask |= mask; in ws16c48_irq_unmask()
302 outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port); in ws16c48_irq_unmask()
349 .irq_mask = ws16c48_irq_mask,
/Linux-v5.4/drivers/thermal/intel/
Dintel_bxt_pmic_thermal.c33 u8 irq_mask; member
53 .irq_mask = 0x01,
62 .irq_mask = 0x10,
74 .irq_mask = 0x02,
83 .irq_mask = 0x20,
95 .irq_mask = 0x04,
104 .irq_mask = 0x40,
116 .irq_mask = 0x10,
173 mask = td->maps[i].trip_config[j].irq_mask; in pmic_thermal_irq_handler()
/Linux-v5.4/arch/arm/mach-omap2/
Ddisplay.c278 u32 v, irq_mask = 0; in dispc_disable_outputs() local
322 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT; in dispc_disable_outputs()
326 irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT; in dispc_disable_outputs()
328 irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT | in dispc_disable_outputs()
334 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; in dispc_disable_outputs()
336 irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT; in dispc_disable_outputs()
342 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); in dispc_disable_outputs()
364 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != in dispc_disable_outputs()
365 irq_mask) { in dispc_disable_outputs()
/Linux-v5.4/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc-compat.c514 u32 irq_mask; in dispc_mgr_enable_digit_out() local
525 irq_mask = dispc_mgr_get_vsync_irq(OMAP_DSS_CHANNEL_DIGIT) | in dispc_mgr_enable_digit_out()
529 irq_mask); in dispc_mgr_enable_digit_out()
531 DSSERR("failed to register %x isr\n", irq_mask); in dispc_mgr_enable_digit_out()
542 irq_mask); in dispc_mgr_enable_digit_out()
544 DSSERR("failed to unregister %x isr\n", irq_mask); in dispc_mgr_enable_digit_out()
551 u32 irq_mask; in dispc_mgr_disable_digit_out() local
562 irq_mask = dispc_mgr_get_framedone_irq(OMAP_DSS_CHANNEL_DIGIT); in dispc_mgr_disable_digit_out()
565 if (!irq_mask) { in dispc_mgr_disable_digit_out()
571 irq_mask = dispc_mgr_get_vsync_irq(OMAP_DSS_CHANNEL_DIGIT); in dispc_mgr_disable_digit_out()
[all …]
/Linux-v5.4/drivers/i2c/busses/
Di2c-cht-wc.c49 u8 irq_mask; member
71 reg &= ~adap->irq_mask; in cht_wc_i2c_adap_thread_handler()
239 if (adap->irq_mask != adap->old_irq_mask) { in cht_wc_i2c_irq_sync_unlock()
241 adap->irq_mask); in cht_wc_i2c_irq_sync_unlock()
243 adap->old_irq_mask = adap->irq_mask; in cht_wc_i2c_irq_sync_unlock()
255 adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; in cht_wc_i2c_irq_enable()
262 adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; in cht_wc_i2c_irq_disable()
340 adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK; in cht_wc_i2c_adap_i2c_probe()
346 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask); in cht_wc_i2c_adap_i2c_probe()
350 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask); in cht_wc_i2c_adap_i2c_probe()
Di2c-nomadik.c447 u32 mcr, irq_mask; in read_i2c() local
463 irq_mask = (I2C_IT_RXFNF | I2C_IT_RXFF | in read_i2c()
467 irq_mask |= I2C_IT_MTD; in read_i2c()
469 irq_mask |= I2C_IT_MTDWS; in read_i2c()
471 irq_mask = I2C_CLEAR_ALL_INTS & IRQ_MASK(irq_mask); in read_i2c()
473 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask, in read_i2c()
516 u32 mcr, irq_mask; in write_i2c() local
533 irq_mask = (I2C_IT_TXFOVR | I2C_IT_MAL | I2C_IT_BERR); in write_i2c()
539 irq_mask |= I2C_IT_TXFNE; in write_i2c()
547 irq_mask |= I2C_IT_MTD; in write_i2c()
[all …]
/Linux-v5.4/drivers/gpu/drm/omapdrm/
Domap_irq.c23 u32 irqmask = priv->irq_mask; in omap_irq_update()
92 priv->irq_mask |= framedone_irq; in omap_irq_enable_framedone()
94 priv->irq_mask &= ~framedone_irq; in omap_irq_enable_framedone()
124 priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, in omap_irq_enable_vblank()
151 priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, in omap_irq_disable_vblank()
179 irqstatus &= priv->irq_mask & mask; in omap_irq_fifo_underflow()
276 priv->irq_mask = DISPC_IRQ_OCP_ERR; in omap_drm_irq_install()
282 priv->irq_mask |= omap_underflow_irqs[i]; in omap_drm_irq_install()
286 priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, i); in omap_drm_irq_install()
/Linux-v5.4/drivers/ide/
Dcmd64x.c192 u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 : in cmd648_clear_irq() local
197 outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask, in cmd648_clear_irq()
206 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 : in cmd64x_clear_irq() local
212 (void) pci_write_config_byte(dev, irq_reg, irq_stat | irq_mask); in cmd64x_clear_irq()
219 u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 : in cmd648_test_irq() local
224 hwif->name, mrdmode, irq_mask); in cmd648_test_irq()
226 return (mrdmode & irq_mask) ? 1 : 0; in cmd648_test_irq()
233 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 : in cmd64x_test_irq() local
240 hwif->name, irq_stat, irq_mask); in cmd64x_test_irq()
242 return (irq_stat & irq_mask) ? 1 : 0; in cmd64x_test_irq()
/Linux-v5.4/arch/arm/mach-cns3xxx/
Dcore.c204 u32 irq_mask; in __cns3xxx_timer_init() local
223 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
224 irq_mask &= ~(1 << 2); in __cns3xxx_timer_init()
225 irq_mask |= 0x03; in __cns3xxx_timer_init()
226 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
238 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
239 irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5)); in __cns3xxx_timer_init()
240 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
/Linux-v5.4/drivers/irqchip/
Dexynos-combiner.c31 unsigned int irq_mask; member
77 status &= chip_data->irq_mask; in combiner_handle_cascade_irq()
111 .irq_mask = combiner_mask_irq,
131 combiner_data->irq_mask = 0xff << ((combiner_nr % 4) << 3); in combiner_init_one()
135 writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR); in combiner_init_one()
235 writel_relaxed(combiner_data[i].irq_mask, in combiner_resume()
Dirq-ingenic-tcu.c30 uint32_t irq_reg, irq_mask; in ingenic_tcu_intc_cascade() local
34 regmap_read(map, TCU_REG_TMR, &irq_mask); in ingenic_tcu_intc_cascade()
38 irq_reg &= ~irq_mask; in ingenic_tcu_intc_cascade()
140 ct->chip.irq_mask = ingenic_tcu_gc_mask_disable_reg; in ingenic_tcu_irq_init()
/Linux-v5.4/arch/mips/loongson64/lemote-2f/
Dpm.c54 int irq_mask; in setup_wakeup_events() local
61 irq_mask = inb(PIC_MASTER_IMR); in setup_wakeup_events()
67 outb(irq_mask & ~(1 << PIC_CASCADE_IR), PIC_MASTER_IMR); in setup_wakeup_events()
/Linux-v5.4/arch/mips/sgi-ip32/
Dip32-irq.c150 .irq_mask = crime_disable_irq,
170 .irq_mask = crime_disable_irq,
203 .irq_mask = disable_macepci_irq,
302 .irq_mask = disable_maceisa_irq,
309 .irq_mask = disable_maceisa_irq,
337 .irq_mask = disable_mace_irq,
/Linux-v5.4/drivers/gpu/drm/arm/
Dhdlcd_drv.c168 unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_irq_postinstall() local
171 irq_mask |= HDLCD_DEBUG_INT_MASK; in hdlcd_irq_postinstall()
173 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); in hdlcd_irq_postinstall()
182 unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_irq_uninstall() local
186 irq_mask &= ~HDLCD_DEBUG_INT_MASK; in hdlcd_irq_uninstall()
190 irq_mask &= ~HDLCD_INTERRUPT_VSYNC; in hdlcd_irq_uninstall()
192 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); in hdlcd_irq_uninstall()
Dmalidp_hw.c938 .irq_mask = MALIDP_DE_IRQ_UNDERRUN |
948 .irq_mask = MALIDP500_SE_IRQ_CONF_MODE |
957 .irq_mask = MALIDP500_DE_IRQ_CONF_VALID,
990 .irq_mask = MALIDP_DE_IRQ_UNDERRUN |
998 .irq_mask = MALIDP550_SE_IRQ_EOW,
1005 .irq_mask = MALIDP550_DC_IRQ_CONF_VALID |
1038 .irq_mask = MALIDP_DE_IRQ_UNDERRUN |
1052 .irq_mask = MALIDP550_SE_IRQ_EOW,
1059 .irq_mask = MALIDP550_DC_IRQ_CONF_VALID |
1197 if (!(status & de->irq_mask)) in malidp_de_irq()
[all …]
/Linux-v5.4/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_interrupts.c188 u32 irq_mask; member
815 if ((irq_status & dpu_irq_map[irq_idx].irq_mask) && in dpu_hw_intr_dispatch_irq()
835 irq_status &= ~dpu_irq_map[irq_idx].irq_mask; in dpu_hw_intr_dispatch_irq()
864 if (cache_irq_mask & irq->irq_mask) { in dpu_hw_intr_enable_irq()
869 cache_irq_mask |= irq->irq_mask; in dpu_hw_intr_enable_irq()
871 DPU_REG_WRITE(&intr->hw, reg->clr_off, irq->irq_mask); in dpu_hw_intr_enable_irq()
883 irq->irq_mask, cache_irq_mask); in dpu_hw_intr_enable_irq()
909 if ((cache_irq_mask & irq->irq_mask) == 0) { in dpu_hw_intr_disable_irq_nolock()
914 cache_irq_mask &= ~irq->irq_mask; in dpu_hw_intr_disable_irq_nolock()
918 DPU_REG_WRITE(&intr->hw, reg->clr_off, irq->irq_mask); in dpu_hw_intr_disable_irq_nolock()
[all …]
/Linux-v5.4/drivers/dma/dw-axi-dmac/
Ddw-axi-dmac-platform.c113 static inline void axi_chan_irq_disable(struct axi_dma_chan *chan, u32 irq_mask) in axi_chan_irq_disable() argument
117 if (likely(irq_mask == DWAXIDMAC_IRQ_ALL)) { in axi_chan_irq_disable()
121 val &= ~irq_mask; in axi_chan_irq_disable()
126 static inline void axi_chan_irq_set(struct axi_dma_chan *chan, u32 irq_mask) in axi_chan_irq_set() argument
128 axi_chan_iowrite32(chan, CH_INTSTATUS_ENA, irq_mask); in axi_chan_irq_set()
131 static inline void axi_chan_irq_sig_set(struct axi_dma_chan *chan, u32 irq_mask) in axi_chan_irq_sig_set() argument
133 axi_chan_iowrite32(chan, CH_INTSIGNAL_ENA, irq_mask); in axi_chan_irq_sig_set()
136 static inline void axi_chan_irq_clear(struct axi_dma_chan *chan, u32 irq_mask) in axi_chan_irq_clear() argument
138 axi_chan_iowrite32(chan, CH_INTCLEAR, irq_mask); in axi_chan_irq_clear()
276 u32 reg, irq_mask; in axi_chan_block_xfer_start() local
[all …]

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