113 static inline void axi_chan_irq_disable(struct axi_dma_chan *chan, u32 irq_mask)  in axi_chan_irq_disable()  argument
117 	if (likely(irq_mask == DWAXIDMAC_IRQ_ALL)) {  in axi_chan_irq_disable()
121 		val &= ~irq_mask;  in axi_chan_irq_disable()
126 static inline void axi_chan_irq_set(struct axi_dma_chan *chan, u32 irq_mask)  in axi_chan_irq_set()  argument
128 	axi_chan_iowrite32(chan, CH_INTSTATUS_ENA, irq_mask);  in axi_chan_irq_set()
131 static inline void axi_chan_irq_sig_set(struct axi_dma_chan *chan, u32 irq_mask)  in axi_chan_irq_sig_set()  argument
133 	axi_chan_iowrite32(chan, CH_INTSIGNAL_ENA, irq_mask);  in axi_chan_irq_sig_set()
136 static inline void axi_chan_irq_clear(struct axi_dma_chan *chan, u32 irq_mask)  in axi_chan_irq_clear()  argument
138 	axi_chan_iowrite32(chan, CH_INTCLEAR, irq_mask);  in axi_chan_irq_clear()
276 	u32 reg, irq_mask;  in axi_chan_block_xfer_start()  local
300 	irq_mask = DWAXIDMAC_IRQ_DMA_TRF | DWAXIDMAC_IRQ_ALL_ERR;  in axi_chan_block_xfer_start()
301 	axi_chan_irq_sig_set(chan, irq_mask);  in axi_chan_block_xfer_start()
304 	irq_mask |= DWAXIDMAC_IRQ_SUSPENDED;  in axi_chan_block_xfer_start()
305 	axi_chan_irq_set(chan, irq_mask);  in axi_chan_block_xfer_start()