Home
last modified time | relevance | path

Searched refs:enable_mask (Results 1 – 25 of 196) sorted by relevance

12345678

/Linux-v5.4/drivers/clk/qcom/
Dgcc-msm8660.c45 .enable_mask = BIT(8),
122 .enable_mask = BIT(11),
138 .enable_mask = BIT(9),
173 .enable_mask = BIT(11),
189 .enable_mask = BIT(9),
224 .enable_mask = BIT(11),
240 .enable_mask = BIT(9),
275 .enable_mask = BIT(11),
291 .enable_mask = BIT(9),
326 .enable_mask = BIT(11),
[all …]
Dgcc-mdm9615.c58 .enable_mask = BIT(0),
69 .enable_mask = BIT(4),
96 .enable_mask = BIT(8),
123 .enable_mask = BIT(11),
206 .enable_mask = BIT(11),
222 .enable_mask = BIT(9),
257 .enable_mask = BIT(11),
273 .enable_mask = BIT(9),
308 .enable_mask = BIT(11),
324 .enable_mask = BIT(9),
[all …]
Dgcc-sdm845.c158 .enable_mask = BIT(0),
173 .enable_mask = BIT(4),
1021 .enable_mask = BIT(0),
1036 .enable_mask = BIT(0),
1056 .enable_mask = BIT(0),
1074 .enable_mask = BIT(0),
1092 .enable_mask = BIT(0),
1110 .enable_mask = BIT(0),
1130 .enable_mask = BIT(10),
1145 .enable_mask = BIT(0),
[all …]
Dgcc-msm8960.c46 .enable_mask = BIT(4),
73 .enable_mask = BIT(8),
258 .enable_mask = BIT(14),
348 .enable_mask = BIT(11),
364 .enable_mask = BIT(9),
399 .enable_mask = BIT(11),
415 .enable_mask = BIT(9),
450 .enable_mask = BIT(11),
466 .enable_mask = BIT(9),
501 .enable_mask = BIT(11),
[all …]
Dgcc-ipq806x.c46 .enable_mask = BIT(0),
73 .enable_mask = BIT(4),
100 .enable_mask = BIT(8),
205 .enable_mask = BIT(14),
362 .enable_mask = BIT(11),
378 .enable_mask = BIT(9),
413 .enable_mask = BIT(11),
429 .enable_mask = BIT(9),
464 .enable_mask = BIT(11),
480 .enable_mask = BIT(9),
[all …]
Dgcc-msm8996.c187 .enable_mask = BIT(0),
223 .enable_mask = BIT(0),
238 .enable_mask = BIT(2),
254 .enable_mask = BIT(4),
1274 .enable_mask = BIT(0),
1289 .enable_mask = BIT(0),
1304 .enable_mask = BIT(0),
1319 .enable_mask = BIT(0),
1334 .enable_mask = BIT(0),
1347 .enable_mask = BIT(0),
[all …]
Dgcc-sm8150.c47 .enable_mask = BIT(0),
93 .enable_mask = BIT(7),
113 .enable_mask = BIT(9),
1124 .enable_mask = BIT(0),
1139 .enable_mask = BIT(0),
1158 .enable_mask = BIT(1),
1177 .enable_mask = BIT(0),
1196 .enable_mask = BIT(1),
1213 .enable_mask = BIT(0),
1230 .enable_mask = BIT(0),
[all …]
Dmmcc-msm8960.c192 .enable_mask = BIT(2),
207 .enable_mask = BIT(0),
241 .enable_mask = BIT(2),
256 .enable_mask = BIT(0),
290 .enable_mask = BIT(2),
305 .enable_mask = BIT(0),
345 .enable_mask = BIT(2),
360 .enable_mask = BIT(0),
376 .enable_mask = BIT(8),
409 .enable_mask = BIT(2),
[all …]
Dmmcc-apq8084.c232 .enable_mask = BIT(0),
259 .enable_mask = BIT(1),
1104 .enable_mask = BIT(0),
1119 .enable_mask = BIT(0),
1136 .enable_mask = BIT(0),
1153 .enable_mask = BIT(0),
1170 .enable_mask = BIT(0),
1187 .enable_mask = BIT(0),
1204 .enable_mask = BIT(0),
1221 .enable_mask = BIT(0),
[all …]
Dmmcc-msm8974.c197 .enable_mask = BIT(0),
224 .enable_mask = BIT(1),
938 .enable_mask = BIT(0),
954 .enable_mask = BIT(0),
971 .enable_mask = BIT(0),
987 .enable_mask = BIT(0),
1004 .enable_mask = BIT(0),
1021 .enable_mask = BIT(0),
1038 .enable_mask = BIT(0),
1055 .enable_mask = BIT(0),
[all …]
Dgcc-apq8084.c119 .enable_mask = BIT(0),
182 .enable_mask = BIT(1),
209 .enable_mask = BIT(4),
281 .enable_mask = BIT(0),
298 .enable_mask = BIT(0),
1324 .enable_mask = BIT(0),
1378 .enable_mask = BIT(12),
1395 .enable_mask = BIT(17),
1411 .enable_mask = BIT(0),
1428 .enable_mask = BIT(0),
[all …]
Dgcc-qcs404.c293 .enable_mask = BIT(23),
310 .enable_mask = BIT(0),
327 .enable_mask = BIT(0),
343 .enable_mask = BIT(1),
389 .enable_mask = BIT(5),
417 .enable_mask = BIT(7),
1238 .enable_mask = BIT(14),
1256 .enable_mask = BIT(1),
1269 .enable_mask = BIT(0),
1286 .enable_mask = BIT(0),
[all …]
Dgcc-sdm660.c158 .enable_mask = BIT(0),
195 .enable_mask = BIT(1),
232 .enable_mask = BIT(4),
985 .enable_mask = BIT(0),
1002 .enable_mask = BIT(0),
1019 .enable_mask = BIT(0),
1032 .enable_mask = BIT(22),
1045 .enable_mask = BIT(0),
1058 .enable_mask = BIT(17),
1071 .enable_mask = BIT(0),
[all …]
Dgcc-ipq8074.c404 .enable_mask = BIT(0),
449 .enable_mask = BIT(2),
482 .enable_mask = BIT(5),
516 .enable_mask = BIT(7),
564 .enable_mask = BIT(6),
596 .enable_mask = BIT(4),
662 .enable_mask = BIT(1),
1254 .enable_mask = BIT(1),
2020 .enable_mask = BIT(0),
2037 .enable_mask = BIT(0),
[all …]
Dmmcc-msm8996.c265 .enable_mask = BIT(0),
295 .enable_mask = BIT(1),
1233 .enable_mask = BIT(0),
1248 .enable_mask = BIT(0),
1263 .enable_mask = BIT(0),
1278 .enable_mask = BIT(0),
1292 .enable_mask = BIT(0),
1307 .enable_mask = BIT(0),
1322 .enable_mask = BIT(0),
1337 .enable_mask = BIT(0),
[all …]
Dgcc-msm8974.c75 .enable_mask = BIT(0),
138 .enable_mask = BIT(1),
165 .enable_mask = BIT(4),
1040 .enable_mask = BIT(26),
1056 .enable_mask = BIT(12),
1073 .enable_mask = BIT(17),
1089 .enable_mask = BIT(0),
1106 .enable_mask = BIT(0),
1123 .enable_mask = BIT(0),
1140 .enable_mask = BIT(0),
[all …]
Dgcc-msm8998.c143 .enable_mask = BIT(0),
204 .enable_mask = BIT(1),
265 .enable_mask = BIT(2),
326 .enable_mask = BIT(3),
387 .enable_mask = BIT(4),
1173 .enable_mask = BIT(0),
1186 .enable_mask = BIT(0),
1204 .enable_mask = BIT(0),
1222 .enable_mask = BIT(0),
1235 .enable_mask = BIT(0),
[all …]
Dgcc-msm8916.c277 .enable_mask = BIT(0),
304 .enable_mask = BIT(1),
331 .enable_mask = BIT(2),
358 .enable_mask = BIT(3),
1225 .enable_mask = BIT(0),
1242 .enable_mask = BIT(0),
1304 .enable_mask = BIT(0),
1335 .enable_mask = BIT(0),
1366 .enable_mask = BIT(0),
1401 .enable_mask = BIT(0),
[all …]
Dcamcc-sdm845.c661 .enable_mask = BIT(0),
679 .enable_mask = BIT(0),
697 .enable_mask = BIT(0),
710 .enable_mask = BIT(0),
728 .enable_mask = BIT(0),
741 .enable_mask = BIT(0),
754 .enable_mask = BIT(0),
772 .enable_mask = BIT(0),
790 .enable_mask = BIT(0),
808 .enable_mask = BIT(0),
[all …]
Dgcc-msm8994.c69 .enable_mask = BIT(0),
97 .enable_mask = BIT(4),
1050 .enable_mask = BIT(17),
1063 .enable_mask = BIT(0),
1081 .enable_mask = BIT(0),
1099 .enable_mask = BIT(0),
1117 .enable_mask = BIT(0),
1135 .enable_mask = BIT(0),
1153 .enable_mask = BIT(0),
1171 .enable_mask = BIT(0),
[all …]
Dgcc-ipq4019.c198 .enable_mask = BIT(0),
215 .enable_mask = BIT(0),
250 .enable_mask = BIT(0),
280 .enable_mask = BIT(0),
322 .enable_mask = BIT(0),
353 .enable_mask = BIT(0),
398 .enable_mask = BIT(0),
429 .enable_mask = BIT(0),
467 .enable_mask = BIT(0),
498 .enable_mask = BIT(0),
[all …]
Dclk-regmap.c33 return (val & rclk->enable_mask) == 0; in clk_is_enabled_regmap()
35 return (val & rclk->enable_mask) != 0; in clk_is_enabled_regmap()
56 val = rclk->enable_mask; in clk_enable_regmap()
59 rclk->enable_mask, val); in clk_enable_regmap()
78 val = rclk->enable_mask; in clk_disable_regmap()
82 regmap_update_bits(rclk->regmap, rclk->enable_reg, rclk->enable_mask, in clk_disable_regmap()
/Linux-v5.4/drivers/acpi/acpica/
Dhwgpe.c24 acpi_hw_gpe_enable_write(u8 enable_mask,
68 u64 enable_mask; in acpi_hw_low_set_gpe() local
82 status = acpi_hw_read(&enable_mask, &gpe_register_info->enable_address); in acpi_hw_low_set_gpe()
95 if (!(register_bit & gpe_register_info->enable_mask)) { in acpi_hw_low_set_gpe()
103 ACPI_SET_BIT(enable_mask, register_bit); in acpi_hw_low_set_gpe()
108 ACPI_CLEAR_BIT(enable_mask, register_bit); in acpi_hw_low_set_gpe()
122 acpi_hw_write(enable_mask, in acpi_hw_low_set_gpe()
270 acpi_hw_gpe_enable_write(u8 enable_mask, in acpi_hw_gpe_enable_write() argument
275 gpe_register_info->enable_mask = enable_mask; in acpi_hw_gpe_enable_write()
277 status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address); in acpi_hw_gpe_enable_write()
[all …]
/Linux-v5.4/arch/arm/mach-ep93xx/
Dclock.c33 u32 enable_mask; member
54 .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN,
61 .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN,
68 .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN,
89 .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN,
95 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
102 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_TSEN,
117 .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE,
124 .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE,
132 .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA,
[all …]
/Linux-v5.4/drivers/regulator/
Dlp8788-ldo.c197 .enable_mask = LP8788_EN_DLDO1_M,
210 .enable_mask = LP8788_EN_DLDO2_M,
223 .enable_mask = LP8788_EN_DLDO3_M,
236 .enable_mask = LP8788_EN_DLDO4_M,
249 .enable_mask = LP8788_EN_DLDO5_M,
262 .enable_mask = LP8788_EN_DLDO6_M,
275 .enable_mask = LP8788_EN_DLDO7_M,
288 .enable_mask = LP8788_EN_DLDO8_M,
301 .enable_mask = LP8788_EN_DLDO9_M,
314 .enable_mask = LP8788_EN_DLDO10_M,
[all …]

12345678