| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dpp.h | 32 struct dpp { struct
111 void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
115 struct dpp *dpp_base,
118 void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
120 void (*dpp_reset)(struct dpp *dpp);
122 void (*dpp_set_scaler)(struct dpp *dpp,
126 struct dpp *dpp,
131 struct dpp *dpp,
136 struct dpp *dpp,
140 struct dpp *dpp,
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| D | opp.h | 200 int dpp[MAX_PIPES]; member
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_cm.c | 43 dpp->tf_regs->reg
46 dpp->base.ctx
50 dpp->tf_shift->field_name, dpp->tf_mask->field_name
112 struct dcn10_dpp *dpp, in program_gamut_remap() argument
138 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
139 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
140 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12; in program_gamut_remap()
141 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
149 dpp->base.ctx, in program_gamut_remap()
159 dpp->base.ctx, in program_gamut_remap()
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| D | dcn10_dpp.c | 42 dpp->tf_regs->reg
45 dpp->base.ctx
49 dpp->tf_shift->field_name, dpp->tf_mask->field_name
94 void dpp_read_state(struct dpp *dpp_base, in dpp_read_state()
97 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_read_state() local
123 void dpp_set_gamut_remap_bypass(struct dcn10_dpp *dpp) in dpp_set_gamut_remap_bypass() argument
133 struct dpp *dpp, in dpp_get_optimal_number_of_taps() argument
146 dpp->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT && in dpp_get_optimal_number_of_taps()
152 dpp->ctx->dc->debug.max_downscale_src_width != 0 && in dpp_get_optimal_number_of_taps()
153 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp_get_optimal_number_of_taps()
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| D | dcn10_dpp_dscl.c | 43 dpp->tf_regs->reg
46 dpp->base.ctx
50 dpp->tf_shift->field_name, dpp->tf_mask->field_name
89 struct dcn10_dpp *dpp, in dpp1_dscl_set_overscan() argument
117 struct dcn10_dpp *dpp, const struct scaler_data *data) in dpp1_dscl_set_otg_blank() argument
168 struct dpp *dpp_base, in dpp1_dscl_get_dscl_mode()
202 struct dcn10_dpp *dpp, in dpp1_dscl_set_lb() argument
207 if (dpp->base.caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT) { in dpp1_dscl_set_lb()
261 struct dcn10_dpp *dpp, in dpp1_dscl_set_scaler_filter() argument
299 struct dcn10_dpp *dpp, in dpp1_dscl_set_scl_filter() argument
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| D | dcn10_hw_sequencer.c | 258 struct dpp *dpp = pool->dpps[i]; in dcn10_log_hw_state() local
261 dpp->funcs->dpp_read_state(dpp, &s); in dcn10_log_hw_state()
268 dpp->inst, in dcn10_log_hw_state()
980 int dpp_id = pipe_ctx->plane_res.dpp->inst; in hwss1_plane_atomic_disconnect()
1007 struct dpp *dpp, in dcn10_plane_atomic_power_down() argument
1016 dc->hwss.dpp_pg_control(hws, dpp->inst, false); in dcn10_plane_atomic_power_down()
1018 dpp->funcs->dpp_reset(dpp); in dcn10_plane_atomic_power_down()
1032 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn10_plane_atomic_disable() local
1039 dpp->funcs->dpp_dppclk_control(dpp, false, false); in dcn10_plane_atomic_disable()
1050 pipe_ctx->plane_res.dpp, in dcn10_plane_atomic_disable()
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| D | dcn10_dpp.h | 30 #define TO_DCN10_DPP(dpp)\ argument
31 container_of(dpp, struct dcn10_dpp, base)
1345 struct dpp base;
1370 struct dpp *dpp_base,
1374 struct dpp *dpp_base,
1381 struct dpp *dpp_base,
1396 struct dpp *dpp_base,
1400 struct dpp *dpp_base,
1404 struct dpp *dpp_base,
1408 struct dpp *dpp_base,
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| D | dcn10_resource.c | 579 static void dcn10_dpp_destroy(struct dpp **dpp) in dcn10_dpp_destroy() argument
581 kfree(TO_DCN10_DPP(*dpp)); in dcn10_dpp_destroy()
582 *dpp = NULL; in dcn10_dpp_destroy()
585 static struct dpp *dcn10_dpp_create( in dcn10_dpp_create()
589 struct dcn10_dpp *dpp = in dcn10_dpp_create() local
592 if (!dpp) in dcn10_dpp_create()
595 dpp1_construct(dpp, ctx, inst, in dcn10_dpp_create()
597 return &dpp->base; in dcn10_dpp_create()
1112 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
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| D | dcn10_hw_sequencer_debug.c | 342 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states() local
345 dpp->funcs->dpp_read_state(dpp, &s); in dcn10_get_cm_states()
352 dpp->inst, s.igam_input_format, in dcn10_get_cm_states()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dpp_cm.c | 37 dpp->tf_regs->reg
40 dpp->base.ctx
44 dpp->tf_shift->field_name, dpp->tf_mask->field_name
51 struct dpp *dpp_base) in dpp2_enable_cm_block()
53 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_enable_cm_block() local
65 struct dpp *dpp_base, in dpp2_degamma_ram_inuse()
70 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_degamma_ram_inuse() local
86 struct dpp *dpp_base, in dpp2_program_degamma_lut()
93 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_program_degamma_lut() local
117 struct dpp *dpp_base, in dpp2_set_degamma_pwl()
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| D | dcn20_dpp.c | 42 dpp->tf_regs->reg
45 dpp->base.ctx
49 dpp->tf_shift->field_name, dpp->tf_mask->field_name
51 void dpp20_read_state(struct dpp *dpp_base, in dpp20_read_state()
54 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_read_state() local
76 struct dpp *dpp_base, in dpp2_power_on_obuf()
79 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_power_on_obuf() local
91 struct dpp *dpp_base, in dpp2_dummy_program_input_lut()
96 struct dpp *dpp_base, in dpp2_cnv_setup()
103 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cnv_setup() local
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| D | dcn20_dpp.h | 30 #define TO_DCN20_DPP(dpp)\ argument
31 container_of(dpp, struct dcn20_dpp, base)
627 struct dpp base;
645 void dpp20_read_state(struct dpp *dpp_base,
649 struct dpp *dpp_base,
653 struct dpp *dpp_base,
657 struct dpp *dpp_base, const struct pwl_params *params);
660 struct dpp *dpp_base,
664 struct dpp *dpp_base,
668 struct dpp *dpp_base,
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| D | dcn20_resource.h | 72 void dcn20_dpp_destroy(struct dpp **dpp);
74 struct dpp *dcn20_dpp_create(
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| D | dcn20_hwseq.c | 479 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn20_plane_atomic_disable() local
493 dpp->funcs->dpp_dppclk_control(dpp, false, false); in dcn20_plane_atomic_disable()
499 pipe_ctx->plane_res.dpp, in dcn20_plane_atomic_disable()
694 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_blend_lut()
716 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_shaper_3dlut()
753 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_input_transfer_func()
917 dcn20_dpp_pg_control(hws, pipe_ctx->plane_res.dpp->inst, true); in dcn20_power_on_plane()
2019 struct dpp *dpp = res_pool->dpps[i]; in dcn20_fpga_init_hw() local
2021 dpp->funcs->dpp_reset(dpp); in dcn20_fpga_init_hw()
2039 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn20_fpga_init_hw() local
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| D | dcn20_resource.c | 855 void dcn20_dpp_destroy(struct dpp **dpp) in dcn20_dpp_destroy() argument
857 kfree(TO_DCN20_DPP(*dpp)); in dcn20_dpp_destroy()
858 *dpp = NULL; in dcn20_dpp_destroy()
861 struct dpp *dcn20_dpp_create( in dcn20_dpp_create()
865 struct dcn20_dpp *dpp = in dcn20_dpp_create() local
868 if (!dpp) in dcn20_dpp_create()
871 if (dpp2_construct(dpp, ctx, inst, in dcn20_dpp_create()
873 return &dpp->base; in dcn20_dpp_create()
876 kfree(dpp); in dcn20_dpp_create()
1619 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
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| /Linux-v5.4/arch/sparc/vdso/ |
| D | vma.c | 250 struct page *dp, **dpp = NULL; in init_vdso_image() local
290 dpp = kcalloc(dnpages, sizeof(struct page *), GFP_KERNEL); in init_vdso_image()
291 vvar_mapping.pages = dpp; in init_vdso_image()
293 if (!dpp) in init_vdso_image()
300 dpp[0] = dp; in init_vdso_image()
318 if (dpp != NULL) { in init_vdso_image()
320 if (dpp[i] != NULL) in init_vdso_image()
321 __free_page(dpp[i]); in init_vdso_image()
323 kfree(dpp); in init_vdso_image()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 169 struct dpp *dpps[MAX_PIPES];
263 struct dpp *dpp; member
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| D | hw_sequencer.h | 83 struct dpp;
290 struct dpp *dpp,
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| /Linux-v5.4/arch/ia64/kernel/ |
| D | unwind_decoder.c | 67 unw_decode_uleb128 (unsigned char **dpp) in unw_decode_uleb128() argument
71 unsigned char *bp = *dpp; in unw_decode_uleb128()
81 *dpp = bp; in unw_decode_uleb128()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr.c | 107 pipe_ctx->plane_res.dpp->funcs->dpp_dppclk_control( in ramp_up_dispclk_with_dpp()
108 pipe_ctx->plane_res.dpp, in ramp_up_dispclk_with_dpp()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| D | dcn20_clk_mgr.c | 113 dpp_inst = context->res_ctx.pipe_ctx[i].plane_res.dpp->inst; in dcn20_update_clocks_update_dpp_dto()
287 dpp_inst = context->res_ctx.pipe_ctx[i].plane_res.dpp->inst; in dcn2_update_clocks()
304 dpp_inst = context->res_ctx.pipe_ctx[i].plane_res.dpp->inst; in dcn2_update_clocks()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 655 static struct dpp *dcn21_dpp_create( in dcn21_dpp_create()
659 struct dcn20_dpp *dpp = in dcn21_dpp_create() local
662 if (!dpp) in dcn21_dpp_create()
665 if (dpp2_construct(dpp, ctx, inst, in dcn21_dpp_create()
667 return &dpp->base; in dcn21_dpp_create()
670 kfree(dpp); in dcn21_dpp_create()
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| /Linux-v5.4/fs/nfsd/ |
| D | vfs.h | 43 int nfsd_cross_mnt(struct svc_rqst *rqstp, struct dentry **dpp,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 1001 if (pipe_ctx->plane_res.dpp != NULL) in resource_build_scaling_params()
1002 res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( in resource_build_scaling_params()
1003 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); in resource_build_scaling_params()
1023 if (pipe_ctx->plane_res.dpp != NULL) in resource_build_scaling_params()
1024 res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( in resource_build_scaling_params()
1025 pipe_ctx->plane_res.dpp, in resource_build_scaling_params()
1217 split_pipe->plane_res.dpp = pool->dpps[i]; in acquire_first_split_pipe()
1621 pipe_ctx->plane_res.dpp = pool->dpps[i]; in acquire_first_free_pipe()
1891 pipe_ctx->plane_res.dpp = pool->dpps[tg_inst]; in acquire_resource_from_hw_enabled_state()
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| /Linux-v5.4/Documentation/devicetree/bindings/media/i2c/ |
| D | adv7604.txt | 45 "main", "avlink", "cec", "infoframe", "esdp", "dpp", "afe",
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