| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | vega12_hwmgr.c | 536 dpm_table->dpm_levels[i].value = clk; in vega12_setup_single_dpm_table()
537 dpm_table->dpm_levels[i].enabled = true; in vega12_setup_single_dpm_table()
570 dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100; in vega12_setup_default_dpm_tables()
583 dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100; in vega12_setup_default_dpm_tables()
596 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; in vega12_setup_default_dpm_tables()
609 dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100; in vega12_setup_default_dpm_tables()
622 dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100; in vega12_setup_default_dpm_tables()
635 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; in vega12_setup_default_dpm_tables()
648 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega12_setup_default_dpm_tables()
713 dpm_table->dpm_levels[min_level].value;
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| D | vega20_hwmgr.c | 577 dpm_table->dpm_levels[i].value = clk; in vega20_setup_single_dpm_table()
578 dpm_table->dpm_levels[i].enabled = true; in vega20_setup_single_dpm_table()
599 dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100; in vega20_setup_gfxclk_dpm_table()
620 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; in vega20_setup_memclk_dpm_table()
652 dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100; in vega20_setup_default_dpm_tables()
679 dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100; in vega20_setup_default_dpm_tables()
692 dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100; in vega20_setup_default_dpm_tables()
705 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; in vega20_setup_default_dpm_tables()
718 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega20_setup_default_dpm_tables()
764 dpm_table->dpm_levels[0].value = data->vbios_boot_state.fclock / 100; in vega20_setup_default_dpm_tables()
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| D | vega10_hwmgr.c | 1232 if (i == 0 || dpm_table->dpm_levels[dpm_table->count - 1].value <= in vega10_setup_default_single_dpm_table()
1234 dpm_table->dpm_levels[dpm_table->count].value = in vega10_setup_default_single_dpm_table()
1236 dpm_table->dpm_levels[dpm_table->count].enabled = true; in vega10_setup_default_single_dpm_table()
1350 dpm_table->dpm_levels[dpm_table->count-1].value; in vega10_setup_default_dpm_tables()
1361 dpm_table->dpm_levels[dpm_table->count-1].value; in vega10_setup_default_dpm_tables()
1367 if (i == 0 || dpm_table->dpm_levels in vega10_setup_default_dpm_tables()
1370 dpm_table->dpm_levels[dpm_table->count].value = in vega10_setup_default_dpm_tables()
1372 dpm_table->dpm_levels[dpm_table->count].enabled = in vega10_setup_default_dpm_tables()
1383 if (i == 0 || dpm_table->dpm_levels in vega10_setup_default_dpm_tables()
1386 dpm_table->dpm_levels[dpm_table->count].value = in vega10_setup_default_dpm_tables()
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| D | smu7_hwmgr.c | 694 if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
696 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
698 …data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = (i == 0) ? 1 : 0; in smu7_setup_dpm_tables_v0()
708 if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
710 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
712 …data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = (i == 0) ? 1 : 0; in smu7_setup_dpm_tables_v0()
719 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
720 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; in smu7_setup_dpm_tables_v0()
722 data->dpm_table.vddc_table.dpm_levels[i].enabled = 1; in smu7_setup_dpm_tables_v0()
731 data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
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| D | smu7_hwmgr.h | 100 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| D | vega10_hwmgr.h | 136 struct vega10_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| D | vega12_hwmgr.h | 110 struct vega12_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| D | vega20_hwmgr.h | 162 struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/ |
| D | vega20_ppt.c | 697 single_dpm_table->dpm_levels[i].value = clk; in vega20_set_single_dpm_table()
698 single_dpm_table->dpm_levels[i].enabled = true; in vega20_set_single_dpm_table()
733 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in vega20_set_default_dpm_table()
749 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in vega20_set_default_dpm_table()
765 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in vega20_set_default_dpm_table()
780 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.eclk / 100; in vega20_set_default_dpm_table()
795 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; in vega20_set_default_dpm_table()
810 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; in vega20_set_default_dpm_table()
826 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in vega20_set_default_dpm_table()
907 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umd_state_clk()
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| D | arcturus_ppt.c | 389 single_dpm_table->dpm_levels[i].value = clk; in arcturus_set_single_dpm_table()
390 single_dpm_table->dpm_levels[i].enabled = true; in arcturus_set_single_dpm_table()
424 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in arcturus_set_default_dpm_table()
439 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in arcturus_set_default_dpm_table()
454 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in arcturus_set_default_dpm_table()
469 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in arcturus_set_default_dpm_table()
547 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in arcturus_populate_umd_state_clk()
548 smu->pstate_mclk = mem_table->dpm_levels[0].value; in arcturus_populate_umd_state_clk()
552 smu->pstate_sclk = gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
553 smu->pstate_mclk = mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
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| D | arcturus_ppt.h | 49 struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER]; member
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| D | vega20_ppt.h | 99 struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| D | navi10_ppt.c | 1427 uint16_t *dpm_levels = NULL; in navi10_get_uclk_dpm_states() local
1437 dpm_levels = driver_ppt->FreqTableUclk; in navi10_get_uclk_dpm_states()
1439 if (num_discrete_levels == 0 || dpm_levels == NULL) in navi10_get_uclk_dpm_states()
1445 *clocks_in_khz = (*dpm_levels) * 1000; in navi10_get_uclk_dpm_states()
1447 dpm_levels++; in navi10_get_uclk_dpm_states()
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| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | ci_dpm.c | 2558 pi->dpm_table.sclk_table.dpm_levels[i].value, in ci_do_program_memory_timing_parameters()
2559 pi->dpm_table.mclk_table.dpm_levels[j].value, in ci_do_program_memory_timing_parameters()
2617 if (dpm_table->dpm_levels[i-1].enabled) in ci_get_dpm_level_enable_mask_value()
2635 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2637 r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
3291 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels()
3337 if (dpm_table->mclk_table.dpm_levels[i].value == 0) in ci_populate_all_memory_levels()
3340 dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
3382 dpm_table->dpm_levels[i].enabled = false; in ci_reset_single_dpm_table()
3388 dpm_table->dpm_levels[index].value = pcie_gen; in ci_setup_pcie_table_entry()
[all …]
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| D | ci_dpm.h | 65 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | fiji_smumgr.c | 840 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in fiji_populate_smc_link_level()
842 dpm_table->pcie_speed_table.dpm_levels[i].param1); in fiji_populate_smc_link_level()
1028 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels()
1239 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in fiji_populate_all_memory_levels()
1243 dpm_table->mclk_table.dpm_levels[i].value, in fiji_populate_all_memory_levels()
1320 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1378 data->dpm_table.mclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1399 data->dpm_table.mclk_table.dpm_levels[0].value, in fiji_populate_smc_acpi_level()
1540 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters()
1541 data->dpm_table.mclk_table.dpm_levels[j].value, in fiji_program_memory_timing_parameters()
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| D | vegam_smumgr.c | 580 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in vegam_populate_smc_link_level()
582 dpm_table->pcie_speed_table.dpm_levels[i].param1); in vegam_populate_smc_link_level()
888 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels()
1047 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels()
1051 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels()
1177 data->dpm_table.mclk_table.dpm_levels[0].value, in vegam_populate_smc_acpi_level()
1299 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in vegam_program_memory_timing_parameters()
1300 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
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| D | polaris10_smumgr.c | 778 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in polaris10_populate_smc_link_level()
780 dpm_table->pcie_speed_table.dpm_levels[i].param1); in polaris10_populate_smc_link_level()
1004 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels()
1140 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in polaris10_populate_all_memory_levels()
1144 dpm_table->mclk_table.dpm_levels[i].value, in polaris10_populate_all_memory_levels()
1262 data->dpm_table.mclk_table.dpm_levels[0].value, in polaris10_populate_smc_acpi_level()
1373 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters()
1374 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in polaris10_program_memory_timing_parameters()
1377 result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j); in polaris10_program_memory_timing_parameters()
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| D | iceland_smumgr.c | 774 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in iceland_populate_smc_link_level()
776 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in iceland_populate_smc_link_level()
982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels()
1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1625 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1764 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
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| D | ci_smumgr.c | 486 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels()
1005 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
1007 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
1315 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in ci_populate_all_memory_levels()
1317 result = ci_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
1661 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in ci_program_memory_timing_parameters()
1662 data->dpm_table.mclk_table.dpm_levels[j].value, in ci_program_memory_timing_parameters()
1797 data->dpm_table.mclk_table.dpm_levels[i].value, in ci_convert_mc_reg_table_to_smc()
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| D | tonga_smumgr.c | 517 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in tonga_populate_smc_link_level()
519 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in tonga_populate_smc_link_level()
712 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels()
1108 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in tonga_populate_all_memory_levels()
1113 dpm_table->mclk_table.dpm_levels[i].value, in tonga_populate_all_memory_levels()
1500 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in tonga_program_memory_timing_parameters()
1501 data->dpm_table.mclk_table.dpm_levels[j].value, in tonga_program_memory_timing_parameters()
2143 data->dpm_table.mclk_table.dpm_levels[i].value, in tonga_convert_mc_reg_table_to_smc()
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