2558 								   pi->dpm_table.sclk_table.dpm_levels[i].value,  in ci_do_program_memory_timing_parameters()
2559 								   pi->dpm_table.mclk_table.dpm_levels[j].value,  in ci_do_program_memory_timing_parameters()
2617 		if (dpm_table->dpm_levels[i-1].enabled)  in ci_get_dpm_level_enable_mask_value()
2635 			(u8)dpm_table->pcie_speed_table.dpm_levels[i].value;  in ci_populate_smc_link_level()
2637 			r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);  in ci_populate_smc_link_level()
3291 						       dpm_table->sclk_table.dpm_levels[i].value,  in ci_populate_all_graphic_levels()
3337 		if (dpm_table->mclk_table.dpm_levels[i].value == 0)  in ci_populate_all_memory_levels()
3340 						      dpm_table->mclk_table.dpm_levels[i].value,  in ci_populate_all_memory_levels()
3382 		dpm_table->dpm_levels[i].enabled = false;  in ci_reset_single_dpm_table()
3388 	dpm_table->dpm_levels[index].value = pcie_gen;  in ci_setup_pcie_table_entry()
3389 	dpm_table->dpm_levels[index].param1 = pcie_lanes;  in ci_setup_pcie_table_entry()
3390 	dpm_table->dpm_levels[index].enabled = true;  in ci_setup_pcie_table_entry()
3482 		    (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3484 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =  in ci_setup_default_dpm_tables()
3486 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3495 		    (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3497 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =  in ci_setup_default_dpm_tables()
3499 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3506 		pi->dpm_table.vddc_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3508 		pi->dpm_table.vddc_table.dpm_levels[i].param1 =  in ci_setup_default_dpm_tables()
3510 		pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3517 			pi->dpm_table.vddci_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3519 			pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3527 			pi->dpm_table.mvdd_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3529 			pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3546 		if (value == table->dpm_levels[i].value) {  in ci_find_boot_level()
3710 		if ((dpm_table->dpm_levels[i].value < low_limit) ||  in ci_trim_single_dpm_states()
3711 		    (dpm_table->dpm_levels[i].value > high_limit))  in ci_trim_single_dpm_states()
3712 			dpm_table->dpm_levels[i].enabled = false;  in ci_trim_single_dpm_states()
3714 			dpm_table->dpm_levels[i].enabled = true;  in ci_trim_single_dpm_states()
3727 		if ((pcie_table->dpm_levels[i].value < speed_low) ||  in ci_trim_pcie_dpm_states()
3728 		    (pcie_table->dpm_levels[i].param1 < lanes_low) ||  in ci_trim_pcie_dpm_states()
3729 		    (pcie_table->dpm_levels[i].value > speed_high) ||  in ci_trim_pcie_dpm_states()
3730 		    (pcie_table->dpm_levels[i].param1 > lanes_high))  in ci_trim_pcie_dpm_states()
3731 			pcie_table->dpm_levels[i].enabled = false;  in ci_trim_pcie_dpm_states()
3733 			pcie_table->dpm_levels[i].enabled = true;  in ci_trim_pcie_dpm_states()
3737 		if (pcie_table->dpm_levels[i].enabled) {  in ci_trim_pcie_dpm_states()
3739 				if (pcie_table->dpm_levels[j].enabled) {  in ci_trim_pcie_dpm_states()
3740 					if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) &&  in ci_trim_pcie_dpm_states()
3741 					    (pcie_table->dpm_levels[i].param1 == pcie_table->dpm_levels[j].param1))  in ci_trim_pcie_dpm_states()
3742 						pcie_table->dpm_levels[j].enabled = false;  in ci_trim_pcie_dpm_states()
3869 		if (sclk == sclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3885 		if (mclk == mclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3911 		dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
3914 		dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
4746 						     pi->dpm_table.mclk_table.dpm_levels[i].value,  in ci_convert_mc_reg_table_to_smc()