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Searched refs:dpcd (Results 1 – 25 of 30) sorted by relevance

12

/Linux-v5.4/drivers/gpu/drm/nouveau/
Dnouveau_dp.c40 nouveau_dp_probe_oui(struct drm_device *dev, struct nvkm_i2c_aux *aux, u8 *dpcd) in nouveau_dp_probe_oui() argument
45 if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in nouveau_dp_probe_oui()
64 u8 dpcd[8]; in nouveau_dp_detect() local
71 ret = nvkm_rdaux(aux, DP_DPCD_REV, dpcd, sizeof(dpcd)); in nouveau_dp_detect()
75 nv_encoder->dp.link_bw = 27000 * dpcd[1]; in nouveau_dp_detect()
76 nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_detect()
79 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); in nouveau_dp_detect()
92 nouveau_dp_probe_oui(dev, aux, dpcd); in nouveau_dp_detect()
94 ret = nv50_mstm_detect(nv_encoder->dp.mstm, dpcd, nouveau_mst); in nouveau_dp_detect()
Dnouveau_encoder.h107 int nv50_mstm_detect(struct nv50_mstm *, u8 dpcd[8], int allow);
/Linux-v5.4/include/drm/
Ddrm_dp_helper.h1059 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1060 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1128 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
1130 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
1134 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
1136 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
1140 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
1142 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
1143 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
1147 drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps3_supported()
[all …]
Ddrm_dp_mst_helper.h514 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Datombios_dp.c256 const u8 dpcd[DP_DPCD_SIZE], in amdgpu_atombios_dp_get_dp_link_config()
263 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
264 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
325 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in amdgpu_atombios_dp_probe_oui()
346 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
348 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in amdgpu_atombios_dp_get_dpcd()
349 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
356 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
411 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_set_link_config()
434 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_mode_valid_helper()
[all …]
Damdgpu_mode.h471 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
/Linux-v5.4/drivers/gpu/drm/radeon/
Datombios_dp.c306 const u8 dpcd[DP_DPCD_SIZE], in radeon_dp_get_dp_link_config()
312 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in radeon_dp_get_dp_link_config()
313 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in radeon_dp_get_dp_link_config()
374 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in radeon_dp_probe_oui()
395 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in radeon_dp_getdpcd()
397 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in radeon_dp_getdpcd()
398 dig_connector->dpcd); in radeon_dp_getdpcd()
405 dig_connector->dpcd[0] = 0; in radeon_dp_getdpcd()
465 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_set_link_config()
492 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_mode_valid_helper()
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Dradeon_dp_mst.c527 dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd); in radeon_mst_mode_fixup()
528 dig_connector->dp_clock = drm_dp_max_link_rate(dig_connector->dpcd); in radeon_mst_mode_fixup()
678 if (dig_connector->dpcd[DP_DPCD_REV] < 0x12) in radeon_dp_mst_probe()
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_dp_link_training.c153 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_link_training_clock_recovery()
184 if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in intel_dp_link_training_clock_recovery()
193 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); in intel_dp_link_training_clock_recovery()
254 sink_tps4 = drm_dp_tps4_supported(intel_dp->dpcd); in intel_dp_training_pattern()
269 sink_tps3 = drm_dp_tps3_supported(intel_dp->dpcd); in intel_dp_training_pattern()
304 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); in intel_dp_link_training_channel_equalization()
Dintel_dp.c177 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in intel_dp_set_sink_rates()
221 int sink_max = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_max_common_lane_count()
265 ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd, in intel_dp_downstream_max_dotclock()
1875 bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd, intel_dp->downstream_ports); in intel_dp_compute_bpp()
2404 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
2414 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
2429 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
3015 return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && in downstream_hpd_needs_d0()
3016 intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && in downstream_hpd_needs_d0()
3042 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_sink_dpms()
[all …]
Dintel_lspcon.c79 if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) { in lspcon_detect_vendor()
Dintel_display_types.h1157 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Ddisplay.c315 kfree(port->dpcd); in clean_virtual_dp_monitor()
316 port->dpcd = NULL; in clean_virtual_dp_monitor()
331 port->dpcd = kzalloc(sizeof(*(port->dpcd)), GFP_KERNEL); in setup_virtual_dp_monitor()
332 if (!port->dpcd) { in setup_virtual_dp_monitor()
341 memcpy(port->dpcd->data, dpcd_fix_data, DPCD_HEADER_SIZE); in setup_virtual_dp_monitor()
342 port->dpcd->data_valid = true; in setup_virtual_dp_monitor()
343 port->dpcd->data[DPCD_SINK_COUNT] = 0x1; in setup_virtual_dp_monitor()
Dhandlers.c862 static void dp_aux_ch_ctl_link_training(struct intel_vgpu_dpcd_data *dpcd, in dp_aux_ch_ctl_link_training() argument
868 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
870 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
875 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
876 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
878 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
879 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
881 dpcd->data[DPCD_LANE_ALIGN_STATUS_UPDATED] |= in dp_aux_ch_ctl_link_training()
887 dpcd->data[DPCD_SINK_STATUS] = DPCD_SINK_IN_SYNC; in dp_aux_ch_ctl_link_training()
907 struct intel_vgpu_dpcd_data *dpcd = NULL; in dp_aux_ch_ctl_mmio_write() local
[all …]
Ddisplay.h159 struct intel_vgpu_dpcd_data *dpcd; member
/Linux-v5.4/drivers/gpu/drm/
Ddrm_dp_helper.c123 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { in drm_dp_link_train_clock_recovery_delay()
124 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_clock_recovery_delay()
131 if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in drm_dp_link_train_clock_recovery_delay()
138 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { in drm_dp_link_train_channel_eq_delay()
139 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_channel_eq_delay()
477 int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_downstream_max_clock()
481 bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] & in drm_dp_downstream_max_clock()
508 int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_downstream_max_bpc()
512 bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] & in drm_dp_downstream_max_bpc()
565 const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_downstream_debug()
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/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Ddp.c51 if (dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL]) in nvkm_dp_train_sense()
52 mdelay(dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4); in nvkm_dp_train_sense()
160 if (lt->dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED) in nvkm_dp_train_eq()
238 dp->dpcd[DPCD_RC02] &= ~DPCD_RC02_TPS3_SUPPORTED; in nvkm_dp_train_links()
239 lt.pc2 = dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED; in nvkm_dp_train_links()
305 if (dp->dpcd[DPCD_RC03] & DPCD_RC03_MAX_DOWNSPREAD) { in nvkm_dp_train_init()
348 const u8 sink_nr = dp->dpcd[DPCD_RC02] & DPCD_RC02_MAX_LANE_COUNT; in nvkm_dp_train()
349 const u8 sink_bw = dp->dpcd[DPCD_RC01_MAX_LINK_RATE]; in nvkm_dp_train()
406 ior->dp.ef = dp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP; in nvkm_dp_train()
520 if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd, in nvkm_dp_enable()
[all …]
Ddp.h24 u8 dpcd[16]; member
/Linux-v5.4/drivers/gpu/drm/gma500/
Dcdv_intel_dp.c266 uint8_t dpcd[4]; member
329 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
330 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
345 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw()
1079 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in cdv_intel_dp_mode_set()
1080 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
1115 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1709 if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, in cdv_dp_detect()
1710 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1712 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/display/exynos/
Dexynos_dp.txt67 -samsung,link-rate: deprecated prop that can reading from monitor by dpcd method.
68 -samsung,lane-count: deprecated prop that can reading from monitor by dpcd method.
/Linux-v5.4/drivers/gpu/drm/rockchip/
Dcdn-dp-core.h101 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
Dcdn-dp-core.c304 sink_max = drm_dp_max_lane_count(dp->dpcd); in cdn_dp_connector_mode_valid()
308 sink_max = drm_dp_max_link_rate(dp->dpcd); in cdn_dp_connector_mode_valid()
368 ret = cdn_dp_dpcd_read(dp, DP_DPCD_REV, dp->dpcd, in cdn_dp_get_sink_capability()
571 u8 sink_lanes = drm_dp_max_lane_count(dp->dpcd); in cdn_dp_check_link_status()
/Linux-v5.4/drivers/gpu/drm/msm/edp/
Dedp_ctrl.c96 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
612 drm_dp_link_train_clock_recovery_delay(ctrl->dpcd); in edp_start_link_train_1()
669 drm_dp_link_train_channel_eq_delay(ctrl->dpcd); in edp_start_link_train_2()
747 drm_dp_link_train_channel_eq_delay(ctrl->dpcd); in edp_clear_training_pattern()
1188 if (drm_dp_dpcd_read(ctrl->drm_aux, DP_DPCD_REV, ctrl->dpcd, in msm_edp_ctrl_panel_connected()
1191 memset(ctrl->dpcd, 0, DP_RECEIVER_CAP_SIZE); in msm_edp_ctrl_panel_connected()
/Linux-v5.4/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c1209 nv50_mstm_enable(struct nv50_mstm *mstm, u8 dpcd, int state) in nv50_mstm_enable() argument
1226 if (dpcd >= 0x12) { in nv50_mstm_enable()
1248 nv50_mstm_detect(struct nv50_mstm *mstm, u8 dpcd[8], int allow) in nv50_mstm_detect()
1271 } else if (dpcd[0] >= 0x12) { in nv50_mstm_detect()
1272 ret = drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &dpcd[1]); in nv50_mstm_detect()
1276 if (!(dpcd[1] & DP_MST_CAP)) in nv50_mstm_detect()
1277 dpcd[0] = 0x11; in nv50_mstm_detect()
1287 ret = nv50_mstm_enable(mstm, dpcd[0], new_state); in nv50_mstm_detect()
1295 return nv50_mstm_enable(mstm, dpcd[0], 0); in nv50_mstm_detect()
1345 u8 dpcd; in nv50_mstm_new() local
[all …]
/Linux-v5.4/drivers/gpu/drm/bridge/
Danalogix-anx78xx.c77 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
781 &anx78xx->dpcd, DP_RECEIVER_CAP_SIZE); in anx78xx_dp_link_training()
813 if (anx78xx->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { in anx78xx_dp_link_training()
832 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd)) in anx78xx_dp_link_training()

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