| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 136 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
139 struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
141 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
143 bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev);
145 bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
151 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
153 bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
157 int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev,
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| D | amdgpu.h | 96 struct amdgpu_device *adev;
214 struct amdgpu_device;
261 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
263 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
265 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
291 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
296 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
299 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
305 bool amdgpu_get_bios(struct amdgpu_device *adev);
306 bool amdgpu_read_bios(struct amdgpu_device *adev);
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| D | amdgpu_irq.h | 39 struct amdgpu_device;
73 int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
76 int (*process)(struct amdgpu_device *adev,
102 void amdgpu_irq_disable_all(struct amdgpu_device *adev);
105 int amdgpu_irq_init(struct amdgpu_device *adev);
106 void amdgpu_irq_fini(struct amdgpu_device *adev);
107 int amdgpu_irq_add_id(struct amdgpu_device *adev,
110 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
112 int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
114 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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| D | si_ih.c | 31 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
33 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
45 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
60 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
98 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
104 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
123 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
144 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
152 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_early_init()
162 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_sw_init()
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| D | amdgpu_rlc.h | 118 bool (*is_rlc_enabled)(struct amdgpu_device *adev);
119 void (*set_safe_mode)(struct amdgpu_device *adev);
120 void (*unset_safe_mode)(struct amdgpu_device *adev);
121 int (*init)(struct amdgpu_device *adev);
122 u32 (*get_csb_size)(struct amdgpu_device *adev);
123 void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer);
124 int (*get_cp_table_num)(struct amdgpu_device *adev);
125 int (*resume)(struct amdgpu_device *adev);
126 void (*stop)(struct amdgpu_device *adev);
127 void (*reset)(struct amdgpu_device *adev);
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| D | tonga_ih.c | 51 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) in tonga_ih_enable_interrupts()
77 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) in tonga_ih_disable_interrupts()
102 static int tonga_ih_irq_init(struct amdgpu_device *adev) in tonga_ih_irq_init()
172 static void tonga_ih_irq_disable(struct amdgpu_device *adev) in tonga_ih_irq_disable()
191 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, in tonga_ih_get_wptr()
222 static void tonga_ih_decode_iv(struct amdgpu_device *adev, in tonga_ih_decode_iv()
253 static void tonga_ih_set_rptr(struct amdgpu_device *adev, in tonga_ih_set_rptr()
267 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_early_init()
282 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_sw_init()
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| D | cik_ih.c | 51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
169 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
187 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
241 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
272 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
280 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_early_init()
295 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_sw_init()
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| D | vce_v2_0.c | 45 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
46 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
57 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
91 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
99 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
116 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
142 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
147 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
168 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
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| D | cz_ih.c | 51 static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cz_ih_enable_interrupts(struct amdgpu_device *adev) in cz_ih_enable_interrupts()
79 static void cz_ih_disable_interrupts(struct amdgpu_device *adev) in cz_ih_disable_interrupts()
106 static int cz_ih_irq_init(struct amdgpu_device *adev) in cz_ih_irq_init()
170 static void cz_ih_irq_disable(struct amdgpu_device *adev) in cz_ih_irq_disable()
189 static u32 cz_ih_get_wptr(struct amdgpu_device *adev, in cz_ih_get_wptr()
220 static void cz_ih_decode_iv(struct amdgpu_device *adev, in cz_ih_decode_iv()
251 static void cz_ih_set_rptr(struct amdgpu_device *adev, in cz_ih_set_rptr()
259 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_early_init()
274 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_sw_init()
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| D | iceland_ih.c | 51 static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) in iceland_ih_enable_interrupts()
79 static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) in iceland_ih_disable_interrupts()
106 static int iceland_ih_irq_init(struct amdgpu_device *adev) in iceland_ih_irq_init()
170 static void iceland_ih_irq_disable(struct amdgpu_device *adev) in iceland_ih_irq_disable()
189 static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, in iceland_ih_get_wptr()
220 static void iceland_ih_decode_iv(struct amdgpu_device *adev, in iceland_ih_decode_iv()
251 static void iceland_ih_set_rptr(struct amdgpu_device *adev, in iceland_ih_set_rptr()
259 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_early_init()
274 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_sw_init()
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| D | amdgpu_pm.h | 33 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);
34 int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
35 int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev);
36 void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
37 void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev);
38 void amdgpu_pm_print_power_states(struct amdgpu_device *adev);
39 int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version);
40 void amdgpu_pm_compute_clocks(struct amdgpu_device *adev);
42 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
43 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable);
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| D | amdgpu_amdkfd.c | 64 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
123 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
143 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
209 void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini()
217 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
224 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev) in amdgpu_amdkfd_suspend()
230 int amdgpu_amdkfd_resume(struct amdgpu_device *adev) in amdgpu_amdkfd_resume()
240 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_pre_reset()
250 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_post_reset()
262 struct amdgpu_device *adev = (struct amdgpu_device *)kgd; in amdgpu_amdkfd_gpu_reset()
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| D | uvd_v4_2.c | 42 static void uvd_v4_2_mc_resume(struct amdgpu_device *adev);
43 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
44 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev);
45 static int uvd_v4_2_start(struct amdgpu_device *adev);
46 static void uvd_v4_2_stop(struct amdgpu_device *adev);
49 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
60 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_wptr()
88 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_set_wptr()
95 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v4_2_early_init()
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| D | amdgpu_xgmi.h | 34 struct amdgpu_device *adev;
38 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock);
39 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
40 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
41 void amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
42 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
43 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
44 struct amdgpu_device *peer_adev);
46 static inline bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev, in amdgpu_xgmi_same_hive()
47 struct amdgpu_device *bo_adev) in amdgpu_xgmi_same_hive()
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| D | uvd_v5_0.c | 41 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
42 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev);
43 static int uvd_v5_0_start(struct amdgpu_device *adev);
44 static void uvd_v5_0_stop(struct amdgpu_device *adev);
47 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
58 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_rptr()
72 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_wptr()
86 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_set_wptr()
93 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_early_init()
105 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_sw_init()
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| D | amdgpu_atomfirmware.h | 29 bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev);
30 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
31 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
32 int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);
33 int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev);
34 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
35 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
36 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
37 bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev);
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| D | amdgpu_virt.h | 55 int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
56 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
57 int (*reset_gpu)(struct amdgpu_device *adev);
58 int (*wait_reset)(struct amdgpu_device *adev);
59 void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3);
60 int (*get_pp_clk)(struct amdgpu_device *adev, u32 type, char *buf);
61 int (*force_dpm_level)(struct amdgpu_device *adev, u32 level);
292 bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev);
293 void amdgpu_virt_init_setting(struct amdgpu_device *adev);
294 uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
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| D | mmhub_v1_0.h | 28 u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev);
29 int mmhub_v1_0_gart_enable(struct amdgpu_device *adev);
30 void mmhub_v1_0_gart_disable(struct amdgpu_device *adev);
31 void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev,
33 void mmhub_v1_0_init(struct amdgpu_device *adev);
34 int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev,
36 void mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags);
37 void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev,
39 void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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| D | amdgpu_gfx.h | 187 uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);
188 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num,
190 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd,
192 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd,
195 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
198 void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
200 int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
201 int (*query_ras_error_count) (struct amdgpu_device *adev, void *ras_error_status);
349 int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg);
350 void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg);
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| D | amdgpu_gart.h | 32 struct amdgpu_device;
58 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
59 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
60 int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
61 void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
62 int amdgpu_gart_init(struct amdgpu_device *adev);
63 void amdgpu_gart_fini(struct amdgpu_device *adev);
64 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
66 int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
69 int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
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| D | nbio_v7_0.c | 36 static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v7_0_remap_hdp_registers()
44 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) in nbio_v7_0_get_rev_id()
54 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v7_0_mc_access_enable()
63 static void nbio_v7_0_hdp_flush(struct amdgpu_device *adev, in nbio_v7_0_hdp_flush()
72 static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev) in nbio_v7_0_get_memsize()
77 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v7_0_sdma_doorbell_range()
94 static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v7_0_vcn_doorbell_range()
114 static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v7_0_enable_doorbell_aperture()
120 static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbio_v7_0_enable_doorbell_selfring_aperture()
126 static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev, in nbio_v7_0_ih_doorbell_range()
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| D | amdgpu_ras.h | 331 struct amdgpu_device *adev;
367 typedef int (*ras_ih_cb)(struct amdgpu_device *adev,
393 struct amdgpu_device *adev;
474 static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev, in amdgpu_ras_is_supported()
484 int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev,
487 void amdgpu_ras_resume(struct amdgpu_device *adev);
488 void amdgpu_ras_suspend(struct amdgpu_device *adev);
490 unsigned long amdgpu_ras_query_error_count(struct amdgpu_device *adev,
494 int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
497 int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev);
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| D | amdgpu_debugfs.h | 34 int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
35 void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev);
36 int amdgpu_debugfs_init(struct amdgpu_device *adev);
37 void amdgpu_debugfs_preempt_cleanup(struct amdgpu_device *adev);
38 int amdgpu_debugfs_add_files(struct amdgpu_device *adev,
41 int amdgpu_debugfs_fence_init(struct amdgpu_device *adev);
42 int amdgpu_debugfs_firmware_init(struct amdgpu_device *adev);
43 int amdgpu_debugfs_gem_init(struct amdgpu_device *adev);
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| D | amdgpu_vm.h | 194 struct amdgpu_device *adev;
343 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
344 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
347 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
349 int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm, unsigned int pasid);
350 void amdgpu_vm_release_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);
351 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
356 int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
360 int amdgpu_vm_update_directories(struct amdgpu_device *adev,
362 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_irq.h | 42 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
50 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
66 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
79 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
83 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
85 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
86 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev);
92 int amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
99 int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
100 int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev);
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