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Searched refs:amdgpu_crtc (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Datombios_crtc.c45 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_atombios_crtc_overscan_setup() local
52 args.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_crtc_overscan_setup()
54 switch (amdgpu_crtc->rmx_type) { in amdgpu_atombios_crtc_overscan_setup()
75 args.usOverscanRight = cpu_to_le16(amdgpu_crtc->h_border); in amdgpu_atombios_crtc_overscan_setup()
76 args.usOverscanLeft = cpu_to_le16(amdgpu_crtc->h_border); in amdgpu_atombios_crtc_overscan_setup()
77 args.usOverscanBottom = cpu_to_le16(amdgpu_crtc->v_border); in amdgpu_atombios_crtc_overscan_setup()
78 args.usOverscanTop = cpu_to_le16(amdgpu_crtc->v_border); in amdgpu_atombios_crtc_overscan_setup()
88 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_atombios_crtc_scaler_setup() local
94 args.ucScaler = amdgpu_crtc->crtc_id; in amdgpu_atombios_crtc_scaler_setup()
96 switch (amdgpu_crtc->rmx_type) { in amdgpu_atombios_crtc_scaler_setup()
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Ddce_v8_0.c186 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v8_0_page_flip() local
187 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; in dce_v8_0_page_flip()
190 WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ? in dce_v8_0_page_flip()
193 WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, in dce_v8_0_page_flip()
196 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, in dce_v8_0_page_flip()
199 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, in dce_v8_0_page_flip()
202 RREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset); in dce_v8_0_page_flip()
443 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v8_0_program_fmt() local
508 WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v8_0_program_fmt()
526 struct amdgpu_crtc *amdgpu_crtc, in dce_v8_0_line_buffer_adjust() argument
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Ddce_virtual.c113 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_virtual_crtc_destroy() local
116 kfree(amdgpu_crtc); in dce_virtual_crtc_destroy()
132 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_virtual_crtc_dpms() local
140 amdgpu_crtc->enabled = true; in dce_virtual_crtc_dpms()
143 amdgpu_crtc->crtc_id); in dce_virtual_crtc_dpms()
151 amdgpu_crtc->enabled = false; in dce_virtual_crtc_dpms()
169 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in dce_virtual_crtc_disable() local
173 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_disable()
174 amdgpu_crtc->encoder = NULL; in dce_virtual_crtc_disable()
175 amdgpu_crtc->connector = NULL; in dce_virtual_crtc_disable()
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Ddce_v11_0.c256 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v11_0_page_flip() local
257 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; in dce_v11_0_page_flip()
261 tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_page_flip()
264 WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_page_flip()
266 WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, in dce_v11_0_page_flip()
269 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, in dce_v11_0_page_flip()
272 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, in dce_v11_0_page_flip()
275 RREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset); in dce_v11_0_page_flip()
529 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v11_0_program_fmt() local
597 WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_program_fmt()
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Ddce_v10_0.c238 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v10_0_page_flip() local
239 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; in dce_v10_0_page_flip()
243 tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_page_flip()
246 WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_page_flip()
248 WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, in dce_v10_0_page_flip()
251 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, in dce_v10_0_page_flip()
254 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, in dce_v10_0_page_flip()
257 RREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset); in dce_v10_0_page_flip()
503 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v10_0_program_fmt() local
571 WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_program_fmt()
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Ddce_v6_0.c193 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v6_0_page_flip() local
194 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; in dce_v6_0_page_flip()
197 WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ? in dce_v6_0_page_flip()
200 WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, in dce_v6_0_page_flip()
203 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, in dce_v6_0_page_flip()
205 WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, in dce_v6_0_page_flip()
209 RREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset); in dce_v6_0_page_flip()
402 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in dce_v6_0_program_fmt() local
449 WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v6_0_program_fmt()
820 struct amdgpu_crtc *amdgpu_crtc, in dce_v6_0_program_watermarks() argument
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Damdgpu_display.c78 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id]; in amdgpu_display_flip_work_func() local
80 struct drm_crtc *crtc = &amdgpu_crtc->base; in amdgpu_display_flip_work_func()
95 if (amdgpu_crtc->enabled && in amdgpu_display_flip_work_func()
102 amdgpu_get_vblank_counter_kms(adev->ddev, amdgpu_crtc->crtc_id)) > 0) { in amdgpu_display_flip_work_func()
114 amdgpu_crtc->pflip_status = AMDGPU_FLIP_SUBMITTED; in amdgpu_display_flip_work_func()
119 amdgpu_crtc->crtc_id, amdgpu_crtc, work); in amdgpu_display_flip_work_func()
156 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_display_crtc_page_flip_target() local
173 work->crtc_id = amdgpu_crtc->crtc_id; in amdgpu_display_crtc_page_flip_target()
226 if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_NONE) { in amdgpu_display_crtc_page_flip_target()
233 amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING; in amdgpu_display_crtc_page_flip_target()
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Damdgpu_pll.c264 struct amdgpu_crtc *test_amdgpu_crtc; in amdgpu_pll_get_use_mask()
291 struct amdgpu_crtc *test_amdgpu_crtc; in amdgpu_pll_get_shared_dp_ppll()
318 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_pll_get_shared_nondp_ppll() local
321 struct amdgpu_crtc *test_amdgpu_crtc; in amdgpu_pll_get_shared_nondp_ppll()
324 adjusted_clock = amdgpu_crtc->adjusted_clock; in amdgpu_pll_get_shared_nondp_ppll()
336 if (test_amdgpu_crtc->connector == amdgpu_crtc->connector) { in amdgpu_pll_get_shared_nondp_ppll()
345 (amdgpu_crtc->ss_enabled == test_amdgpu_crtc->ss_enabled) && in amdgpu_pll_get_shared_nondp_ppll()
Damdgpu_dpm.c122 struct amdgpu_crtc *amdgpu_crtc; in amdgpu_dpm_get_active_displays() local
129 amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_dpm_get_active_displays()
130 if (amdgpu_crtc->enabled) { in amdgpu_dpm_get_active_displays()
131 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
143 struct amdgpu_crtc *amdgpu_crtc; in amdgpu_dpm_get_vblank_time() local
149 amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_dpm_get_vblank_time()
150 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { in amdgpu_dpm_get_vblank_time()
152 amdgpu_crtc->hw_mode.crtc_htotal * in amdgpu_dpm_get_vblank_time()
153 (amdgpu_crtc->hw_mode.crtc_vblank_end - in amdgpu_dpm_get_vblank_time()
154 amdgpu_crtc->hw_mode.crtc_vdisplay + in amdgpu_dpm_get_vblank_time()
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Damdgpu_mode.h56 #define to_amdgpu_crtc(x) container_of(x, struct amdgpu_crtc, base)
319 struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS];
380 struct amdgpu_crtc { struct
Datombios_encoders.c353 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in amdgpu_atombios_encoder_get_bpc() local
354 bpc = amdgpu_crtc->bpc; in amdgpu_atombios_encoder_get_bpc()
803 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in amdgpu_atombios_encoder_setup_dig_transmitter() local
804 pll_id = amdgpu_crtc->pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
1471 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); in amdgpu_atombios_encoder_set_crtc_source() local
1487 args.v1.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_encoder_set_crtc_source()
1526 args.v2.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_encoder_set_crtc_source()
1594 args.v3.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_encoder_set_crtc_source()
Damdgpu_device.c3045 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_device_suspend() local
3049 if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) { in amdgpu_device_suspend()
3050 struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo); in amdgpu_device_suspend()
3160 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_device_resume() local
3162 if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) { in amdgpu_device_resume()
3163 struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo); in amdgpu_device_resume()
3169 amdgpu_crtc->cursor_addr = amdgpu_bo_gpu_offset(aobj); in amdgpu_device_resume()
Damdgpu_kms.c473 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); in amdgpu_info_ioctl() local
474 ui32 = amdgpu_crtc->crtc_id; in amdgpu_info_ioctl()
Dsi_dpm.c5779 struct amdgpu_crtc *amdgpu_crtc = NULL; in si_upload_smc_data() local
5787 amdgpu_crtc = adev->mode_info.crtcs[i]; in si_upload_smc_data()
5792 if (amdgpu_crtc == NULL) in si_upload_smc_data()
5795 if (amdgpu_crtc->line_time <= 0) in si_upload_smc_data()
5800 amdgpu_crtc->crtc_id) != PPSMC_Result_OK) in si_upload_smc_data()
5805 amdgpu_crtc->wm_high / amdgpu_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()
5810 amdgpu_crtc->wm_low / amdgpu_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()
/Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c164 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; in dm_vblank_get_counter()
187 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; in dm_crtc_get_scanoutpos()
237 static struct amdgpu_crtc *
243 struct amdgpu_crtc *amdgpu_crtc; in get_crtc_by_otg_inst() local
251 amdgpu_crtc = to_amdgpu_crtc(crtc); in get_crtc_by_otg_inst()
253 if (amdgpu_crtc->otg_inst == otg_inst) in get_crtc_by_otg_inst()
254 return amdgpu_crtc; in get_crtc_by_otg_inst()
268 struct amdgpu_crtc *amdgpu_crtc; in dm_pflip_high_irq() local
277 amdgpu_crtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_PFLIP); in dm_pflip_high_irq()
281 if (amdgpu_crtc == NULL) { in dm_pflip_high_irq()
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Damdgpu_dm_irq.c624 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc_id]; in dm_irq_state()