78 	struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id];  in amdgpu_display_flip_work_func()  local
80 	struct drm_crtc *crtc = &amdgpu_crtc->base;  in amdgpu_display_flip_work_func()
95 	if (amdgpu_crtc->enabled &&  in amdgpu_display_flip_work_func()
102 		  amdgpu_get_vblank_counter_kms(adev->ddev, amdgpu_crtc->crtc_id)) > 0) {  in amdgpu_display_flip_work_func()
114 	amdgpu_crtc->pflip_status = AMDGPU_FLIP_SUBMITTED;  in amdgpu_display_flip_work_func()
119 					 amdgpu_crtc->crtc_id, amdgpu_crtc, work);  in amdgpu_display_flip_work_func()
156 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_crtc_page_flip_target()  local
173 	work->crtc_id = amdgpu_crtc->crtc_id;  in amdgpu_display_crtc_page_flip_target()
226 	if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_NONE) {  in amdgpu_display_crtc_page_flip_target()
233 	amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING;  in amdgpu_display_crtc_page_flip_target()
234 	amdgpu_crtc->pflip_works = work;  in amdgpu_display_crtc_page_flip_target()
238 					 amdgpu_crtc->crtc_id, amdgpu_crtc, work);  in amdgpu_display_crtc_page_flip_target()
687 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_crtc_scaling_mode_fixup()  local
694 	amdgpu_crtc->h_border = 0;  in amdgpu_display_crtc_scaling_mode_fixup()
695 	amdgpu_crtc->v_border = 0;  in amdgpu_display_crtc_scaling_mode_fixup()
706 			amdgpu_crtc->rmx_type = RMX_OFF;  in amdgpu_display_crtc_scaling_mode_fixup()
709 			amdgpu_crtc->rmx_type = amdgpu_encoder->rmx_type;  in amdgpu_display_crtc_scaling_mode_fixup()
711 			amdgpu_crtc->rmx_type = RMX_OFF;  in amdgpu_display_crtc_scaling_mode_fixup()
713 		memcpy(&amdgpu_crtc->native_mode,  in amdgpu_display_crtc_scaling_mode_fixup()
717 		dst_v = amdgpu_crtc->native_mode.vdisplay;  in amdgpu_display_crtc_scaling_mode_fixup()
719 		dst_h = amdgpu_crtc->native_mode.hdisplay;  in amdgpu_display_crtc_scaling_mode_fixup()
728 				amdgpu_crtc->h_border = amdgpu_encoder->underscan_hborder;  in amdgpu_display_crtc_scaling_mode_fixup()
730 				amdgpu_crtc->h_border = (mode->hdisplay >> 5) + 16;  in amdgpu_display_crtc_scaling_mode_fixup()
732 				amdgpu_crtc->v_border = amdgpu_encoder->underscan_vborder;  in amdgpu_display_crtc_scaling_mode_fixup()
734 				amdgpu_crtc->v_border = (mode->vdisplay >> 5) + 16;  in amdgpu_display_crtc_scaling_mode_fixup()
735 			amdgpu_crtc->rmx_type = RMX_FULL;  in amdgpu_display_crtc_scaling_mode_fixup()
737 			dst_v = crtc->mode.vdisplay - (amdgpu_crtc->v_border * 2);  in amdgpu_display_crtc_scaling_mode_fixup()
739 			dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2);  in amdgpu_display_crtc_scaling_mode_fixup()
742 	if (amdgpu_crtc->rmx_type != RMX_OFF) {  in amdgpu_display_crtc_scaling_mode_fixup()
746 		amdgpu_crtc->vsc.full = dfixed_div(a, b);  in amdgpu_display_crtc_scaling_mode_fixup()
749 		amdgpu_crtc->hsc.full = dfixed_div(a, b);  in amdgpu_display_crtc_scaling_mode_fixup()
751 		amdgpu_crtc->vsc.full = dfixed_const(1);  in amdgpu_display_crtc_scaling_mode_fixup()
752 		amdgpu_crtc->hsc.full = dfixed_const(1);  in amdgpu_display_crtc_scaling_mode_fixup()