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Searched refs:XAXIDMA_RX_CR_OFFSET (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/net/ethernet/ni/
Dnixge.c31 #define XAXIDMA_RX_CR_OFFSET 0x30 /* Channel control */ macro
343 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_hw_dma_bd_init()
353 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_hw_dma_bd_init()
372 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_hw_dma_bd_init()
373 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, in nixge_hw_dma_bd_init()
416 __nixge_device_reset(priv, XAXIDMA_RX_CR_OFFSET); in nixge_device_reset()
687 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_poll()
689 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_poll()
727 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_tx_irq()
731 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_tx_irq()
[all …]
/Linux-v5.4/drivers/net/ethernet/xilinx/
Dxilinx_axienet_main.c242 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
252 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_bd_init()
271 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
272 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, in axienet_dma_bd_init()
803 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_tx_irq()
807 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_tx_irq()
852 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_rx_irq()
856 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_rx_irq()
998 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_stop()
1000 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_stop()
[all …]
Dxilinx_axienet.h79 #define XAXIDMA_RX_CR_OFFSET 0x00000030 /* Channel control */ macro