| /Linux-v5.4/drivers/net/ethernet/mscc/ |
| D | ocelot_regs.c | 11 REG(ANA_ADVLEARN, 0x009000),
12 REG(ANA_VLANMASK, 0x009004),
13 REG(ANA_PORT_B_DOMAIN, 0x009008),
14 REG(ANA_ANAGEFIL, 0x00900c),
15 REG(ANA_ANEVENTS, 0x009010),
16 REG(ANA_STORMLIMIT_BURST, 0x009014),
17 REG(ANA_STORMLIMIT_CFG, 0x009018),
18 REG(ANA_ISOLATED_PORTS, 0x009028),
19 REG(ANA_COMMUNITY_PORTS, 0x00902c),
20 REG(ANA_AUTOAGE, 0x009030),
[all …]
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| /Linux-v5.4/tools/perf/arch/csky/util/ |
| D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
22 dwarf_regs[0] = REG(A0); in libdw__arch_set_initial_registers()
23 dwarf_regs[1] = REG(A1); in libdw__arch_set_initial_registers()
24 dwarf_regs[2] = REG(A2); in libdw__arch_set_initial_registers()
25 dwarf_regs[3] = REG(A3); in libdw__arch_set_initial_registers()
26 dwarf_regs[4] = REG(REGS0); in libdw__arch_set_initial_registers()
27 dwarf_regs[5] = REG(REGS1); in libdw__arch_set_initial_registers()
28 dwarf_regs[6] = REG(REGS2); in libdw__arch_set_initial_registers()
29 dwarf_regs[7] = REG(REGS3); in libdw__arch_set_initial_registers()
30 dwarf_regs[8] = REG(REGS4); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/tools/perf/arch/s390/util/ |
| D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
24 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
25 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
26 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
27 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
28 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
29 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
30 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
31 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
32 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/tools/perf/arch/arm64/util/ |
| D | unwind-libdw.c | 13 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
19 dwarf_regs[0] = REG(X0); in libdw__arch_set_initial_registers()
20 dwarf_regs[1] = REG(X1); in libdw__arch_set_initial_registers()
21 dwarf_regs[2] = REG(X2); in libdw__arch_set_initial_registers()
22 dwarf_regs[3] = REG(X3); in libdw__arch_set_initial_registers()
23 dwarf_regs[4] = REG(X4); in libdw__arch_set_initial_registers()
24 dwarf_regs[5] = REG(X5); in libdw__arch_set_initial_registers()
25 dwarf_regs[6] = REG(X6); in libdw__arch_set_initial_registers()
26 dwarf_regs[7] = REG(X7); in libdw__arch_set_initial_registers()
27 dwarf_regs[8] = REG(X8); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/tools/perf/arch/riscv/util/ |
| D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
22 dwarf_regs[1] = REG(RA); in libdw__arch_set_initial_registers()
23 dwarf_regs[2] = REG(SP); in libdw__arch_set_initial_registers()
24 dwarf_regs[3] = REG(GP); in libdw__arch_set_initial_registers()
25 dwarf_regs[4] = REG(TP); in libdw__arch_set_initial_registers()
26 dwarf_regs[5] = REG(T0); in libdw__arch_set_initial_registers()
27 dwarf_regs[6] = REG(T1); in libdw__arch_set_initial_registers()
28 dwarf_regs[7] = REG(T2); in libdw__arch_set_initial_registers()
29 dwarf_regs[8] = REG(S0); in libdw__arch_set_initial_registers()
30 dwarf_regs[9] = REG(S1); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/tools/perf/arch/powerpc/util/ |
| D | unwind-libdw.c | 22 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
28 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
29 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
30 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
31 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
32 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
33 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
34 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
35 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
36 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/drivers/net/ethernet/apple/ |
| D | mace.h | 9 #define REG(x) volatile unsigned char x; char x ## _pad[15] macro
12 REG(rcvfifo); /* receive FIFO */
13 REG(xmtfifo); /* transmit FIFO */
14 REG(xmtfc); /* transmit frame control */
15 REG(xmtfs); /* transmit frame status */
16 REG(xmtrc); /* transmit retry count */
17 REG(rcvfc); /* receive frame control */
18 REG(rcvfs); /* receive frame status (4 bytes) */
19 REG(fifofc); /* FIFO frame count */
20 REG(ir); /* interrupt register */
[all …]
|
| /Linux-v5.4/tools/perf/arch/x86/util/ |
| D | unwind-libdw.c | 14 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
21 dwarf_regs[0] = REG(AX); in libdw__arch_set_initial_registers()
22 dwarf_regs[1] = REG(CX); in libdw__arch_set_initial_registers()
23 dwarf_regs[2] = REG(DX); in libdw__arch_set_initial_registers()
24 dwarf_regs[3] = REG(BX); in libdw__arch_set_initial_registers()
25 dwarf_regs[4] = REG(SP); in libdw__arch_set_initial_registers()
26 dwarf_regs[5] = REG(BP); in libdw__arch_set_initial_registers()
27 dwarf_regs[6] = REG(SI); in libdw__arch_set_initial_registers()
28 dwarf_regs[7] = REG(DI); in libdw__arch_set_initial_registers()
29 dwarf_regs[8] = REG(IP); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/drivers/regulator/ |
| D | rn5t618-regulator.c | 25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ macro
45 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
46 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
47 REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
48 REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500),
50 REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
51 REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
52 REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000),
53 REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
54 REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000),
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_translate_dce120.c | 51 #define REG(reg_name)\ macro
69 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
99 case REG(DC_GPIO_HPD_A): in offset_to_id()
126 case REG(DC_GPIO_SYNCA_A): in offset_to_id()
141 case REG(DC_GPIO_GENLK_A): in offset_to_id()
165 case REG(DC_GPIO_DDC1_A): in offset_to_id()
168 case REG(DC_GPIO_DDC2_A): in offset_to_id()
171 case REG(DC_GPIO_DDC3_A): in offset_to_id()
174 case REG(DC_GPIO_DDC4_A): in offset_to_id()
177 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ macro
69 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
99 case REG(DC_GPIO_HPD_A): in offset_to_id()
126 case REG(DC_GPIO_SYNCA_A): in offset_to_id()
141 case REG(DC_GPIO_GENLK_A): in offset_to_id()
165 case REG(DC_GPIO_DDC1_A): in offset_to_id()
168 case REG(DC_GPIO_DDC2_A): in offset_to_id()
171 case REG(DC_GPIO_DDC3_A): in offset_to_id()
174 case REG(DC_GPIO_DDC4_A): in offset_to_id()
177 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /Linux-v5.4/tools/perf/arch/arm/util/ |
| D | unwind-libdw.c | 13 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
19 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
20 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
21 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
22 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
23 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
24 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
25 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
26 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
27 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
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| /Linux-v5.4/arch/m68k/lib/ |
| D | mulsi3.S | 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
67 #define d0 REG (d0)
68 #define d1 REG (d1)
69 #define d2 REG (d2)
70 #define d3 REG (d3)
71 #define d4 REG (d4)
72 #define d5 REG (d5)
73 #define d6 REG (d6)
74 #define d7 REG (d7)
75 #define a0 REG (a0)
[all …]
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| D | umodsi3.S | 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
67 #define d0 REG (d0)
68 #define d1 REG (d1)
69 #define d2 REG (d2)
70 #define d3 REG (d3)
71 #define d4 REG (d4)
72 #define d5 REG (d5)
73 #define d6 REG (d6)
74 #define d7 REG (d7)
75 #define a0 REG (a0)
[all …]
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| D | modsi3.S | 63 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
69 #define d0 REG (d0)
70 #define d1 REG (d1)
71 #define d2 REG (d2)
72 #define d3 REG (d3)
73 #define d4 REG (d4)
74 #define d5 REG (d5)
75 #define d6 REG (d6)
76 #define d7 REG (d7)
77 #define a0 REG (a0)
[all …]
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| D | divsi3.S | 63 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
69 #define d0 REG (d0)
70 #define d1 REG (d1)
71 #define d2 REG (d2)
72 #define d3 REG (d3)
73 #define d4 REG (d4)
74 #define d5 REG (d5)
75 #define d6 REG (d6)
76 #define d7 REG (d7)
77 #define a0 REG (a0)
[all …]
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| D | udivsi3.S | 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
67 #define d0 REG (d0)
68 #define d1 REG (d1)
69 #define d2 REG (d2)
70 #define d3 REG (d3)
71 #define d4 REG (d4)
72 #define d5 REG (d5)
73 #define d6 REG (d6)
74 #define d7 REG (d7)
75 #define a0 REG (a0)
[all …]
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| /Linux-v5.4/arch/sparc/include/asm/ |
| D | trap_block.h | 118 #define __GET_CPUID(REG) \ argument
120 661: ldxa [%g0] ASI_UPA_CONFIG, REG; \
121 srlx REG, 17, REG; \
122 and REG, 0x1f, REG; \
128 ldxa [%g0] ASI_SAFARI_CONFIG, REG; \
129 srlx REG, 17, REG; \
130 and REG, 0x3ff, REG; \
133 ldxa [%g0] ASI_JBUS_CONFIG, REG; \
134 srlx REG, 17, REG; \
135 and REG, 0x1f, REG; \
[all …]
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| D | asm.h | 14 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument
15 brz,PREDICT REG, DEST
16 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
17 brz,a,PREDICT REG, DEST
18 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument
19 brnz,PREDICT REG, DEST
20 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
21 brnz,a,PREDICT REG, DEST
27 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument
28 cmp REG, 0; \
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_translate_dcn20.c | 55 #undef REG
56 #define REG(reg_name)\ macro
74 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
104 case REG(DC_GPIO_HPD_A): in offset_to_id()
131 case REG(DC_GPIO_GENLK_A): in offset_to_id()
155 case REG(DC_GPIO_DDC1_A): in offset_to_id()
158 case REG(DC_GPIO_DDC2_A): in offset_to_id()
161 case REG(DC_GPIO_DDC3_A): in offset_to_id()
164 case REG(DC_GPIO_DDC4_A): in offset_to_id()
167 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_cm.c | 42 #define REG(reg)\ macro
145 gam_regs.csc_c11_c12 = REG(CM_GAMUT_REMAP_C11_C12); in program_gamut_remap()
146 gam_regs.csc_c33_c34 = REG(CM_GAMUT_REMAP_C33_C34); in program_gamut_remap()
155 gam_regs.csc_c11_c12 = REG(CM_COMA_C11_C12); in program_gamut_remap()
156 gam_regs.csc_c33_c34 = REG(CM_COMA_C33_C34); in program_gamut_remap()
165 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C12); in program_gamut_remap()
166 gam_regs.csc_c33_c34 = REG(CM_COMB_C33_C34); in program_gamut_remap()
240 gam_regs.csc_c11_c12 = REG(CM_OCSC_C11_C12); in dpp1_cm_program_color_matrix()
241 gam_regs.csc_c33_c34 = REG(CM_OCSC_C33_C34); in dpp1_cm_program_color_matrix()
245 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C12); in dpp1_cm_program_color_matrix()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_translate_dcn21.c | 55 #undef REG
56 #define REG(reg_name)\ macro
73 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
107 case REG(DC_GPIO_HPD_A): in offset_to_id()
134 case REG(DC_GPIO_GENLK_A): in offset_to_id()
158 case REG(DC_GPIO_DDC1_A): in offset_to_id()
161 case REG(DC_GPIO_DDC2_A): in offset_to_id()
164 case REG(DC_GPIO_DDC3_A): in offset_to_id()
167 case REG(DC_GPIO_DDC4_A): in offset_to_id()
170 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /Linux-v5.4/arch/mips/ar7/ |
| D | irq.c | 33 #define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) macro
42 REG(ESR_OFFSET(d->irq - ar7_irq_base))); in ar7_unmask_irq()
48 REG(ECR_OFFSET(d->irq - ar7_irq_base))); in ar7_mask_irq()
54 REG(CR_OFFSET(d->irq - ar7_irq_base))); in ar7_ack_irq()
59 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); in ar7_unmask_sec_irq()
64 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); in ar7_mask_sec_irq()
69 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); in ar7_ack_sec_irq()
98 writel(0xffffffff, REG(ECR_OFFSET(0))); in ar7_irq_init()
99 writel(0xff, REG(ECR_OFFSET(32))); in ar7_irq_init()
100 writel(0xffffffff, REG(SEC_ECR_OFFSET)); in ar7_irq_init()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/i2c/ |
| D | tda998x_drv.c | 101 #define REG(page, addr) (((page) << 8) | (addr)) macro
109 #define REG_VERSION_LSB REG(0x00, 0x00) /* read */
110 #define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
117 #define REG_VERSION_MSB REG(0x00, 0x02) /* read */
118 #define REG_SOFTRESET REG(0x00, 0x0a) /* write */
121 #define REG_DDC_DISABLE REG(0x00, 0x0b) /* read/write */
122 #define REG_CCLK_ON REG(0x00, 0x0c) /* read/write */
123 #define REG_I2C_MASTER REG(0x00, 0x0d) /* read/write */
127 #define REG_FEAT_POWERDOWN REG(0x00, 0x0e) /* read/write */
131 #define REG_INT_FLAGS_0 REG(0x00, 0x0f) /* read/write */
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 33 #define REG(reg)\ macro
154 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_A[opp_id]); in mpc2_set_output_csc()
155 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]); in mpc2_set_output_csc()
157 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_B[opp_id]); in mpc2_set_output_csc()
158 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_B[opp_id]); in mpc2_set_output_csc()
195 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_A[opp_id]); in mpc2_set_ocsc_default()
196 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]); in mpc2_set_ocsc_default()
198 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_B[opp_id]); in mpc2_set_ocsc_default()
199 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_B[opp_id]); in mpc2_set_ocsc_default()
294 gam_regs.start_cntl_b = REG(MPCC_OGAM_RAMB_START_CNTL_B[mpcc_id]); in mpc2_program_lutb()
[all …]
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