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Searched refs:PACKETJ (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c1775 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_insert_start()
1778 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_insert_start()
1794 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_insert_end()
1797 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_insert_end()
1817 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_fence()
1821 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA1), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_fence()
1825 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_fence()
1829 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_fence()
1833 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_CMD), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_fence()
1837 …PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_CMD), 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE4… in vcn_v1_0_jpeg_ring_emit_fence()
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Dvcn_v2_0.c1852 amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_insert_start()
1856 amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, in vcn_v2_0_jpeg_ring_insert_start()
1870 amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_insert_end()
1874 amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, in vcn_v2_0_jpeg_ring_insert_end()
1892 amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
1896 amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
1900 amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
1904 amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
1908 amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
1912 amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET, in vcn_v2_0_jpeg_ring_emit_fence()
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Dsoc15d.h74 #define PACKETJ(reg, r, cond, type) ((reg & 0x3FFFF) | \ macro
Damdgpu_vcn.c755 ib->ptr[0] = PACKETJ(adev->vcn.internal.jpeg_pitch, 0, 0, PACKETJ_TYPE0); in amdgpu_vcn_jpeg_set_reg()
758 ib->ptr[i] = PACKETJ(0, 0, 0, PACKETJ_TYPE6); in amdgpu_vcn_jpeg_set_reg()