Searched refs:MPS (Results 1 – 9 of 9) sorted by relevance
105 T4VF_MOD_MAP(MPS, 0, MPS_VF_CTL, MPS_VF_STAT_RX_VF_ERR_FRAMES_H)
78 #define MPS 1 macro
97 1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS)99 a) speed is Gen-2 and MPS is 256B100 b) speed is >= Gen-3 with any MPS
63 Under "SDK Resources" => "Intel(R) vPro(TM) Gateway (MPS)"
351 case MPS: in mpoa_device_type_string()423 if ((mpoa_device_type == MPS || mpoa_device_type == MPC) && in lane2_assoc_ind()428 if (mpoa_device_type != MPS && in lane2_assoc_ind()
25 MultiProcessor Specification (MPS), and the Advanced Power
3477 pcie_bus_tune_off Disable PCIe MPS (Max Payload Size)3478 tuning and use the BIOS-configured MPS defaults.3479 pcie_bus_safe Set every device's MPS to the largest value3481 pcie_bus_perf Set device MPS to the largest allowable MPS3484 value (no larger than the MPS that the device3486 pcie_bus_peer2peer Set every device's MPS to 128B, which
2298 set the SMP (or MPS) version on BIOS to 1.1 instead of
433 bool "Enable MPS table" if ACPI || SFI
