Searched refs:MDMA (Results 1 – 7 of 7) sorted by relevance
1 * STMicroelectronics STM32 MDMA controller3 The STM32 MDMA is a general-purpose direct memory access controller capable of8 - reg: Should contain MDMA registers location and length. This should include10 - interrupts: Should contain the MDMA interrupt.37 DMA clients connected to the STM32 MDMA controller must use the format39 a phandle to the MDMA controller plus the following five integer cells:71 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes)72 0x01: Each MDMA request triggers a block transfer (max 64K bytes)73 0x10: Each MDMA request triggers a repeated block transfer74 0x11: Each MDMA request triggers a linked list transfer[all …]
113 #define MDMA 100 macro
28 instance number should be 0 for DSP MDMA MMUs and 1 for
23 which generates clocks for G2D/MDMA IPs.
535 Enable support for the on-chip MDMA controller on STMicroelectronics
1255 clocks = <&rcc MDMA>;
1892 PCLK(MDMA, "mdma", "ck_axi", 0, G_MDMA),
