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Searched refs:IS_CHERRYVIEW (Results 1 – 25 of 31) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_pipe_crc.c153 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg()
415 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
549 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
622 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
Dintel_lpe_audio.c118 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
182 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
Dintel_dp.c750 if (IS_CHERRYVIEW(dev_priv)) in vlv_power_sequencer_kick()
762 release_cl_override = IS_CHERRYVIEW(dev_priv) && in vlv_power_sequencer_kick()
765 if (vlv_force_pll_on(dev_priv, pipe, IS_CHERRYVIEW(dev_priv) ? in vlv_power_sequencer_kick()
984 if (WARN_ON(!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_power_sequencer_reset()
1031 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers()
1080 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in edp_notify_handler()
1106 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
1119 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1740 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_dp_set_clock()
2432 if (IS_CHERRYVIEW(dev_priv)) in intel_dp_prepare()
[all …]
Dintel_cdclk.c493 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
500 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
2211 else if (IS_CHERRYVIEW(dev_priv)) in intel_pixel_rate_to_cdclk()
2264 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
2605 else if (IS_CHERRYVIEW(dev_priv)) in intel_compute_max_dotclk()
2676 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_update_max_cdclk()
2710 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2795 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_rawclk()
2827 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
2847 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_init_cdclk_hooks()
Dvlv_dsi_pll.c71 if (IS_CHERRYVIEW(dev_priv)) { in dsi_calc_mnp()
263 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; in vlv_dsi_get_pclk()
Dintel_hdmi.c960 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_set_gcp_infoframe()
985 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_read_gcp_infoframe()
1748 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_prepare()
2137 if (IS_CHERRYVIEW(dev_priv) && clock > 216000 && clock < 240000) in hdmi_port_clock_valid()
3016 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_ddc_pin()
3032 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_infoframe_init()
3193 if (IS_CHERRYVIEW(dev_priv)) { in intel_hdmi_init()
3217 if (IS_CHERRYVIEW(dev_priv)) { in intel_hdmi_init()
Dvlv_dsi.c784 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_pre_enable()
990 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_get_hw_state()
1337 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_prepare()
1610 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in vlv_dsi_get_panel_orientation()
1924 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in vlv_dsi_init()
Dintel_audio.c572 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
631 IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_enable()
788 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
Dintel_display.c207 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
607 !IS_CHERRYVIEW(dev_priv) && !IS_GEN9_LP(dev_priv)) in intel_PLL_is_valid()
611 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_PLL_is_valid()
842 if (IS_CHERRYVIEW(to_i915(dev))) { in vlv_PLL_is_optimal()
1218 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in assert_panel_unlocked()
2023 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_linear_alignment()
3728 if (IS_CHERRYVIEW(dev_priv)) in i9xx_plane_has_windowing()
3814 } else if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) { in i9xx_update_plane()
6869 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in valleyview_crtc_enable()
6882 if (IS_CHERRYVIEW(dev_priv)) { in valleyview_crtc_enable()
[all …]
Dintel_sprite.c103 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
966 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) in vlv_update_plane()
1639 if (IS_CHERRYVIEW(dev_priv) && in chv_plane_check_rotation()
1915 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl()
2553 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_sprite_plane_create()
2598 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
Dintel_dsi_vbt.c370 else if (IS_CHERRYVIEW(dev_priv)) in mipi_exec_gpio()
Dintel_gmbus.c842 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_gmbus_setup()
Dintel_panel.c1497 if (IS_CHERRYVIEW(dev_priv)) in vlv_hz_to_pwm()
1994 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_panel_init_backlight_funcs()
/Linux-v5.4/drivers/gpu/drm/i915/selftests/
Dintel_uncore.c153 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in live_forcewake_ops()
265 !IS_CHERRYVIEW(dev_priv)) in live_forcewake_domains()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_sysfs.c269 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in gt_act_freq_mhz_show()
592 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
613 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
629 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
Di915_drv.c211 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
454 if (IS_CHERRYVIEW(dev_priv)) { in intel_init_dpio()
1859 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drm_suspend_late()
2039 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drm_resume_early()
2621 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
2672 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
2700 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_runtime_resume()
2719 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_resume()
Dintel_uncore.c528 if (IS_CHERRYVIEW(uncore->i915)) { in forcewake_early_sanitize()
883 IS_CHERRYVIEW(dev_priv) || \
1483 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
1681 if (IS_CHERRYVIEW(i915)) { in uncore_forcewake_init()
1734 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
Di915_irq.c1208 adj = IS_CHERRYVIEW(dev_priv) ? 2 : 1; in gen6_pm_rps_work()
1224 adj = IS_CHERRYVIEW(dev_priv) ? -2 : -1; in gen6_pm_rps_work()
1875 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1913 IS_CHERRYVIEW(dev_priv)) { in i9xx_hpd_irq_handler()
3168 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_reset()
3202 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall()
4374 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4424 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_handler()
4447 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_reset()
4470 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_postinstall()
Dintel_pm.c375 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in _intel_set_memory_cxsr()
465 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_set_memory_cxsr()
1019 if (IS_CHERRYVIEW(dev_priv)) { in vlv_write_wm_values()
1612 if (IS_CHERRYVIEW(dev_priv)) { in vlv_setup_wm_latency()
5943 if (IS_CHERRYVIEW(dev_priv)) { in vlv_read_wm_values()
6137 if (IS_CHERRYVIEW(dev_priv)) { in vlv_wm_get_hw_state()
6759 if (WARN_ONCE(IS_CHERRYVIEW(dev_priv) && (val & 1), in valleyview_set_rps()
6860 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in gen6_rps_idle()
6918 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_set_rps()
8665 if (IS_CHERRYVIEW(dev_priv)) in intel_init_gt_powersave()
[all …]
Di915_debugfs.c437 if (IS_CHERRYVIEW(dev_priv)) { in i915_interrupt_info()
791 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_frequency_info()
1281 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drpc_info()
1429 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_sr_status()
1719 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_rps_boost_info()
3314 if (IS_CHERRYVIEW(dev_priv)) in wm_latency_show()
3334 IS_CHERRYVIEW(dev_priv) || in wm_latency_show()
3434 if (IS_CHERRYVIEW(dev_priv)) in wm_latency_write()
3958 if (IS_CHERRYVIEW(dev_priv)) in i915_sseu_status()
Dintel_device_info.c895 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_device_info_runtime_init()
960 else if (IS_CHERRYVIEW(dev_priv)) in intel_device_info_runtime_init()
Di915_gem_fence_reg.c832 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) in i915_ggtt_init_fences()
Di915_gem_gtt.c1498 if (IS_CHERRYVIEW(i915) || IS_BROXTON(i915)) in gen8_ppgtt_create()
2018 else if (IS_CHERRYVIEW(i915)) in gtt_write_workarounds()
2973 else if (IS_CHERRYVIEW(dev_priv) || IS_GEN9_LP(dev_priv)) in setup_private_pat()
3000 if (IS_CHERRYVIEW(dev_priv)) in gen8_gmch_probe()
3016 IS_CHERRYVIEW(dev_priv) /* fails with concurrent use/update */) { in gen8_gmch_probe()
Di915_pmu.c348 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in config_status()
Di915_perf.c3077 } else if (IS_CHERRYVIEW(dev_priv)) { in i915_perf_register()
3600 if (IS_CHERRYVIEW(dev_priv)) { in i915_perf_init()

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