Searched refs:INPLL (Results 1 – 6 of 6) sorted by relevance
137 tmp = INPLL(pllSCLK_CNTL); in radeon_pm_disable_dynamic_mode()142 tmp = INPLL(pllMCLK_CNTL); in radeon_pm_disable_dynamic_mode()154 tmp = INPLL(pllSCLK_CNTL); in radeon_pm_disable_dynamic_mode()168 tmp = INPLL(pllSCLK_CNTL2); in radeon_pm_disable_dynamic_mode()174 tmp = INPLL(pllSCLK_CNTL); in radeon_pm_disable_dynamic_mode()185 tmp = INPLL(pllSCLK_MORE_CNTL); in radeon_pm_disable_dynamic_mode()190 tmp = INPLL(pllMCLK_CNTL); in radeon_pm_disable_dynamic_mode()198 tmp = INPLL(pllVCLK_ECP_CNTL); in radeon_pm_disable_dynamic_mode()204 tmp = INPLL(pllPIXCLKS_CNTL); in radeon_pm_disable_dynamic_mode()226 tmp = INPLL(pllSCLK_CNTL); in radeon_pm_disable_dynamic_mode()[all …]
626 switch((INPLL(PPLL_REF_DIV) & 0x30000) >> 16) { in radeon_probe_pll_params()633 n = ((INPLL(M_SPLL_REF_FB_DIV) >> 16) & 0xff); in radeon_probe_pll_params()634 m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); in radeon_probe_pll_params()639 n = ((INPLL(M_SPLL_REF_FB_DIV) >> 8) & 0xff); in radeon_probe_pll_params()640 m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); in radeon_probe_pll_params()649 n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff); in radeon_probe_pll_params()650 m = (INPLL(PPLL_REF_DIV) & 0x3ff); in radeon_probe_pll_params()655 switch ((INPLL(PPLL_DIV_0 + ppll_div_sel) >> 16) & 0x7) { in radeon_probe_pll_params()691 tmp = INPLL(M_SPLL_REF_FB_DIV); in radeon_probe_pll_params()692 ref_div = INPLL(PPLL_REF_DIV) & 0x3ff; in radeon_probe_pll_params()[all …]
99 tmpPixclksCntl = INPLL(PIXCLKS_CNTL); in radeon_bl_update_status()
202 mclk_cntl = INPLL(MCLK_CNTL); in radeonfb_engine_reset()
423 #define INPLL(addr) __INPLL(rinfo, addr) macro
316 ulOrigVCLK_ECP_CNTL = INPLL(VCLK_ECP_CNTL); in radeon_crt_is_connected()668 ppll_divn = INPLL(PPLL_DIV_0 + ppll_div_sel); in radeon_fixup_panel_info()
