Searched refs:FORMAT_CONTROL (Results 1 – 5 of 5) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dpp.c | 113 REG_SET_2(FORMAT_CONTROL, 0, in dpp2_cnv_setup()
122 REG_UPDATE(FORMAT_CONTROL, FORMAT_CNV16, 0); in dpp2_cnv_setup()
123 REG_UPDATE(FORMAT_CONTROL, CNVC_BYPASS_MSB_ALIGN, 0); in dpp2_cnv_setup()
124 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE, 0); in dpp2_cnv_setup()
125 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE_C, 0); in dpp2_cnv_setup()
219 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp2_cnv_setup()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_ipp.h | 35 SRI(FORMAT_CONTROL, CNVC_CFG, id), \
172 uint32_t FORMAT_CONTROL; member
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| D | dcn10_dpp.c | 322 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_cnv_setup()
328 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_cnv_setup()
399 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp1_cnv_setup()
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| D | dcn10_dpp_cm.c | 726 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_full_bypass()
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| D | dcn10_dpp.h | 117 SRI(FORMAT_CONTROL, CNVC_CFG, id), \
1330 uint32_t FORMAT_CONTROL; \
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