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/Linux-v5.4/Documentation/translations/ko_KR/
Dmemory-barriers.txt93 - CPU 메모리 배리어.
103 (*) CPU 간 ACQUIRING 배리어의 효과.
119 (*) CPU 캐시의 영향.
125 (*) CPU 들이 저지르는 일들.
149 | CPU 1 |<----->| Memory |<----->| CPU 2 |
166 프로그램은 여러 메모리 액세스 오퍼레이션을 발생시키고, 각각의 CPU 는 그런
167 프로그램들을 실행합니다. 추상화된 CPU 모델에서 메모리 오퍼레이션들의 순서는
168 매우 완화되어 있고, CPU 는 프로그램이 인과관계를 어기지 않는 상태로 관리된다고
174 따라서 위의 다이어그램에서 한 CPU가 동작시키는 메모리 오퍼레이션이 만들어내는
175 변화는 해당 오퍼레이션이 CPU 와 시스템의 다른 부분들 사이의 인터페이스(점선)를
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/Linux-v5.4/arch/sparc/kernel/
Dcpu.c54 #define CPU(ver, _name) \ macro
68 CPU(0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
70 CPU(4, "Fujitsu MB86904"),
71 CPU(5, "Fujitsu TurboSparc MB86907"),
72 CPU(-1, NULL)
88 CPU(0, "LSI Logic Corporation - L64811"),
90 CPU(1, "Cypress/ROSS CY7C601"),
92 CPU(3, "Cypress/ROSS CY7C611"),
94 CPU(0xf, "ROSS HyperSparc RT620"),
95 CPU(0xe, "ROSS HyperSparc RT625 or RT626"),
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/Linux-v5.4/Documentation/translations/zh_CN/
Dio_ordering.txt35 CPU A: spin_lock_irqsave(&dev_lock, flags)
36 CPU A: val = readl(my_status);
37 CPU A: ...
38 CPU A: writel(newval, ring_ptr);
39 CPU A: spin_unlock_irqrestore(&dev_lock, flags)
41 CPU B: spin_lock_irqsave(&dev_lock, flags)
42 CPU B: val = readl(my_status);
43 CPU B: ...
44 CPU B: writel(newval2, ring_ptr);
45 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
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/Linux-v5.4/Documentation/
Dio_ordering.txt18 CPU A: spin_lock_irqsave(&dev_lock, flags)
19 CPU A: val = readl(my_status);
20 CPU A: ...
21 CPU A: writel(newval, ring_ptr);
22 CPU A: spin_unlock_irqrestore(&dev_lock, flags)
24 CPU B: spin_lock_irqsave(&dev_lock, flags)
25 CPU B: val = readl(my_status);
26 CPU B: ...
27 CPU B: writel(newval2, ring_ptr);
28 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
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Dmemory-barriers.txt65 - CPU memory barriers.
75 (*) Inter-CPU acquiring barrier effects.
121 | CPU 1 |<----->| Memory |<----->| CPU 2 |
138 Each CPU executes a program that generates memory access operations. In the
139 abstract CPU, memory operation ordering is very relaxed, and a CPU may actually
146 CPU are perceived by the rest of the system as the operations cross the
147 interface between the CPU and rest of the system (the dotted lines).
152 CPU 1 CPU 2
179 Furthermore, the stores committed by a CPU to the memory system may not be
180 perceived by the loads made by another CPU in the same order as the stores were
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/Linux-v5.4/Documentation/translations/zh_CN/arm64/
Dbooting.txt41 这个术语来定义在将控制权交给 Linux 内核前 CPU 上执行的所有软件。
153 - 主 CPU 通用寄存器设置
159 - CPU 模式
162 CPU 必须处于 EL2（推荐，可访问虚拟化扩展）或非安全 EL1 模式下。
178 CNTFRQ 必须设定为计时器的频率，且 CNTVOFF 必须设定为对所有 CPU
183 通过内核启动的所有 CPU 在内核入口地址上必须处于相同的一致性域中。
184 这可能要根据具体实现来定义初始化过程，以使能每个CPU上对维护操作的
207 以上对于 CPU 模式、高速缓存、MMU、架构计时器、一致性、系统寄存器的
208 必要条件描述适用于所有 CPU。所有 CPU 必须在同一异常级别跳入内核。
210 引导装载程序必须在每个 CPU 处于以下状态时跳入内核入口：
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/Linux-v5.4/Documentation/x86/
Dtopology.rst75 A per-CPU variable containing:
105 CPU.
143 The alternative Linux CPU enumeration depends on how the BIOS enumerates the
145 That has the "advantage" that the logical Linux CPU numbers of threads 0 stay
151 [package 0] -> [core 0] -> [thread 0] -> Linux CPU 0
157 [package 0] -> [core 0] -> [thread 0] -> Linux CPU 0
158 -> [core 1] -> [thread 0] -> Linux CPU 1
162 [package 0] -> [core 0] -> [thread 0] -> Linux CPU 0
163 -> [thread 1] -> Linux CPU 1
164 -> [core 1] -> [thread 0] -> Linux CPU 2
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/Linux-v5.4/Documentation/vm/
Dmmu_notifier.rst10 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
11 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
41 CPU-thread-0 {try to write to addrA}
42 CPU-thread-1 {try to write to addrB}
43 CPU-thread-2 {}
44 CPU-thread-3 {}
48 CPU-thread-0 {COW_step0: {mmu_notifier_invalidate_range_start(addrA)}}
49 CPU-thread-1 {COW_step0: {mmu_notifier_invalidate_range_start(addrB)}}
50 CPU-thread-2 {}
51 CPU-thread-3 {}
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/Linux-v5.4/arch/mips/bcm63xx/
DKconfig2 menu "CPU support"
6 bool "support 3368 CPU"
11 bool "support 6328 CPU"
16 bool "support 6338 CPU"
21 bool "support 6345 CPU"
25 bool "support 6348 CPU"
30 bool "support 6358 CPU"
35 bool "support 6362 CPU"
40 bool "support 6368 CPU"
/Linux-v5.4/drivers/media/pci/cx18/
Dcx18-mailbox.c36 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
37 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
38 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
39 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
40 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
41 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
42 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
43 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
44 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
45 API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
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/Linux-v5.4/Documentation/admin-guide/
Dkernel-per-CPU-kthreads.rst5 This document lists per-CPU kthreads in the Linux kernel and presents
6 options to control their OS jitter. Note that non-per-CPU kthreads are
7 not listed here. To reduce OS jitter from non-per-CPU kthreads, bind
8 them to a "housekeeping" CPU dedicated to such work.
23 - /sys/devices/system/cpu/cpuN/online: Control CPU N's hotplug state,
26 - In order to locate kernel-generated OS jitter on CPU N:
46 that does not require per-CPU kthreads. This will prevent these
52 3. Rework the eHCA driver so that its per-CPU kthreads are
65 some other CPU.
78 occur on some other CPU and furthermore initiate all
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/Linux-v5.4/Documentation/RCU/
Dstallwarn.txt1 Using RCU's CPU Stall Detector
3 This document first discusses what sorts of issues RCU's CPU stall
9 What Causes RCU CPU Stall Warnings?
11 So your kernel printed an RCU CPU stall warning. The next question is
12 "What caused it?" The following problems can result in RCU CPU stall
15 o A CPU looping in an RCU read-side critical section.
17 o A CPU looping with interrupts disabled.
19 o A CPU looping with preemption disabled.
21 o A CPU looping with bottom halves disabled.
23 o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel
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/Linux-v5.4/Documentation/arm/
Dcluster-pm-race-avoidance.rst5 This file documents the algorithm which is used to coordinate CPU and
48 Each cluster and CPU is assigned a state, as follows:
67 The CPU or cluster is not coherent, and is either powered off or
71 The CPU or cluster has committed to moving to the UP state.
76 The CPU or cluster is active and coherent at the hardware
77 level. A CPU in this state is not necessarily being used
81 The CPU or cluster has committed to moving to the DOWN
86 Each CPU has one of these states assigned to it at any point in time.
87 The CPU states are described in the "CPU state" section, below.
95 To help distinguish the CPU states from cluster states in this
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/Linux-v5.4/Documentation/power/
Dsuspend-and-cpuhotplug.rst2 Interaction of Suspend code (S3) with the CPU hotplug infrastructure
8 I. Differences between CPU hotplug and Suspend-to-RAM
11 How does the regular CPU hotplug code differ from how the Suspend-to-RAM
17 interactions involving the freezer and CPU hotplug and also tries to explain
21 What happens when regular CPU hotplug and Suspend-to-RAM race with each other
66 Common | before taking down the CPU |
117 Regular CPU hotplug call path
139 Common | before taking down the CPU
149 regular CPU hotplug]
154 regular CPU hotplug and the suspend code path converge at the _cpu_down() and
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/Linux-v5.4/Documentation/ia64/
Dirq-redir.rst13 IRQ target is one particular CPU and cannot be a mask of several
20 The target CPU has to be specified as a hexadecimal CPU mask. The
21 first non-zero bit is the selected CPU. This format has been kept for
25 interrupts to CPU #3 (logical CPU number) (2^3=0x08)::
29 Set the default route for IRQ number 41 to CPU 6 in lowest priority
38 gives the target CPU mask for the specified interrupt vector. If the CPU
49 IO-SAPIC interrupts are initialized with CPU#0 as their default target
57 - maximal if the CPU is going to be switched off.
59 The IRQ is routed to the CPU with lowest XTP register value, the
60 search begins at the default CPU. Therefore most of the interrupts
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/Linux-v5.4/Documentation/cpu-freq/
Dcpufreq-stats.txt2 CPU frequency and voltage scaling statistics in the Linux(TM) kernel
20 cpufreq-stats is a driver that provides CPU frequency statistics for each CPU.
23 in /sysfs (<sysfs root>/devices/system/cpu/cpuX/cpufreq/stats/) for each CPU.
27 that may be running on your CPU. So, it will work with any cpufreq_driver.
60 this CPU. The cat output will have "<frequency> <time>" pair in each line, which
61 will mean this CPU spent <time> usertime units of time at <frequency>. Output
76 This gives the total number of frequency transitions on this CPU. The cat
86 This will give a fine grained information about all the CPU frequency
115 CPU Frequency scaling --->
116 [*] CPU Frequency scaling
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/Linux-v5.4/Documentation/networking/
Dscaling.rst60 for each CPU if the device supports enough queues, or otherwise at least
77 this to notify a CPU when new packets arrive on the given queue. The
79 that can route each interrupt to a particular CPU. The active mapping
81 an IRQ may be handled on any CPU. Because a non-negligible part of packet
98 receive queue overflows due to a saturated CPU, because in default
104 a separate CPU. For interrupt handling, HT has shown no benefit in
105 initial tests, so limit the number of queues to the number of CPU cores
114 Whereas RSS selects the queue and hence CPU that will run the hardware
115 interrupt handler, RPS selects the CPU to perform protocol processing
117 on the desired CPU’s backlog queue and waking up the CPU for processing.
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/Linux-v5.4/drivers/cpuidle/
DKconfig.arm3 # ARM CPU Idle drivers
6 bool "Generic ARM/ARM64 CPU idle Driver"
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
34 Select this option to enable CPU idle driver for big.LITTLE based
37 multiple CPU idle drivers infrastructure.
40 bool "CPU Idle Driver for CLPS711X processors"
46 bool "CPU Idle Driver for Calxeda processors"
53 bool "CPU Idle Driver for Marvell Kirkwood SoCs"
56 This adds the CPU Idle driver for Marvell Kirkwood SoCs.
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/Linux-v5.4/Documentation/core-api/
Dcpu_hotplug.rst2 CPU hotplug in the Kernel
18 insertion and removal require support for CPU hotplug.
21 provisioning reasons, or for RAS purposes to keep an offending CPU off
22 system execution path. Hence the need for CPU hotplug support in the
25 A more novel use of CPU-hotplug support is its use today in suspend resume
65 CPU maps
78 after a CPU is available for kernel scheduling and ready to receive
79 interrupts from devices. Its cleared when a CPU is brought down using
81 migrated to another target CPU.
91 You really don't need to manipulate any of the system CPU maps. They should
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/Linux-v5.4/drivers/cpufreq/
DKconfig2 menu "CPU Frequency scaling"
5 bool "CPU Frequency scaling"
8 CPU Frequency scaling allows you to change the clock speed of
10 the lower the CPU clock speed, the less power the CPU consumes.
12 Note that this driver doesn't automatically change the CPU
31 bool "CPU frequency transition statistics"
33 Export CPU frequency statistics information through sysfs.
51 the CPU.
59 the CPU.
66 you to set the CPU frequency manually or when a userspace
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/Linux-v5.4/Documentation/devicetree/bindings/arm/
Dcoresight-cpu-debug.txt1 * CoreSight CPU Debug Component:
3 CoreSight CPU debug component are compliant with the ARMv8 architecture
7 and eventually the debug module connects with CPU for debugging. And the
9 to sample CPU program counter, secure state and exception level, etc;
10 usually every CPU has one dedicated debug module to be connected.
26 processor core is clocked by the internal CPU clock, so it
27 is enabled with CPU clock by default.
29 - cpu : the CPU phandle the debug module is affined to. Do not assume it
38 constrain idle states to ensure registers in the CPU power
/Linux-v5.4/Documentation/trace/
Dcoresight-cpu-debug.rst2 Coresight CPU Debug Module
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
20 to sample CPU program counter, secure state and exception level, etc; usually
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
24 will dump related registers for every CPU; finally this is good for assistant
43 - The driver supports a CPU running in either AArch64 or AArch32 mode. The
54 instruction set state". For ARMv7-a, the driver checks furthermore if CPU
61 state". So on ARMv8 if EDDEVID1.PCSROffset is 0b0010 and the CPU operates
62 in AArch32 state, EDPCSR is not sampled; when the CPU operates in AArch64
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/Linux-v5.4/Documentation/admin-guide/pm/
Dcpufreq.rst8 CPU Performance Scaling
16 The Concept of CPU Performance Scaling
23 can be retired by the CPU over a unit of time, but also the higher the clock
25 time (or the more power is drawn) by the CPU in the given P-state. Therefore
26 there is a natural tradeoff between the CPU capacity (the number of instructions
27 that can be executed over a unit of time) and the power drawn by the CPU.
33 instructions so quickly and maintaining the highest available CPU capacity for a
35 It also may not be physically possible to maintain maximum CPU capacity for too
41 Typically, they are used along with algorithms to estimate the required CPU
45 to as CPU performance scaling or CPU frequency scaling (because it involves
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/Linux-v5.4/Documentation/admin-guide/cgroup-v1/
Dcpuacct.rst2 CPU Accounting Controller
5 The CPU accounting controller is used to group tasks using cgroups and
6 account the CPU usage of these groups of tasks.
8 The CPU accounting controller supports multi-hierarchy groups. An accounting
9 group accumulates the CPU usage of all of its child groups and the tasks
19 /sys/fs/cgroup/cpuacct.usage gives the CPU time (in nanoseconds) obtained
20 by this group which is essentially the CPU time obtained by all the tasks
30 process (bash) into it. CPU time consumed by this bash and its children
35 CPU time obtained by the cgroup into user and system times. Currently
/Linux-v5.4/Documentation/devicetree/bindings/nios2/
Dnios2.txt12 - reg: Contains CPU index.
16 - clock-frequency: Contains the clock frequency for CPU, in Hz.
26 - altr,has-mul: Specifies CPU hardware multipy support, should be 1.
27 - altr,has-mmu: Specifies CPU support MMU support, should be 1.
28 - altr,has-initda: Specifies CPU support initda instruction, should be 1.
29 - altr,reset-addr: Specifies CPU reset address
30 - altr,fast-tlb-miss-addr: Specifies CPU fast TLB miss exception address
31 - altr,exception-addr: Specifies CPU exception address
34 - altr,has-div: Specifies CPU hardware divide support

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