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Searched refs:CNVC_SURFACE_PIXEL_FORMAT (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_ipp.h36 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
78 IPP_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
130 type CNVC_SURFACE_PIXEL_FORMAT; \
168 uint32_t CNVC_SURFACE_PIXEL_FORMAT; member
Ddcn10_dpp.c397 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp1_cnv_setup()
398 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); in dpp1_cnv_setup()
Ddcn10_dpp_cm.c722 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp1_full_bypass()
723 CNVC_SURFACE_PIXEL_FORMAT, 0x8); in dpp1_full_bypass()
Ddcn10_dpp.h118 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
322 TF_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
1065 type CNVC_SURFACE_PIXEL_FORMAT; \
1331 uint32_t CNVC_SURFACE_PIXEL_FORMAT; \
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp.c217 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp2_cnv_setup()
218 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); in dpp2_cnv_setup()