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Searched refs:CLK_TOP_ETHER_50M_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/Documentation/devicetree/bindings/net/
Dmediatek-dwmac.txt63 <&topckgen CLK_TOP_ETHER_50M_SEL>;
65 <&topckgen CLK_TOP_ETHER_50M_SEL>;
/Linux-v5.4/include/dt-bindings/clock/
Dmt2712-clk.h186 #define CLK_TOP_ETHER_50M_SEL 155 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt2712.c864 MUX_GATE(CLK_TOP_ETHER_50M_SEL, "ether_50m_sel",