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Searched refs:CLK_FIN_PLL (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dexynos5410.h13 #define CLK_FIN_PLL 1 macro
Dexynos5250.h13 #define CLK_FIN_PLL 1 macro
Dexynos5420.h13 #define CLK_FIN_PLL 1 macro
Dexynos4.h15 #define CLK_FIN_PLL 3 macro
Dexynos3250.h26 #define CLK_FIN_PLL 2 macro
/Linux-v5.4/arch/arm/boot/dts/
Dexynos3250.dtsi176 clocks = <&cmu CLK_FIN_PLL>;
227 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
228 <&cmu CLK_FIN_PLL>;
279 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5250.dtsi230 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
244 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
295 clocks = <&clock CLK_FIN_PLL>;
655 clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
686 clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
Dexynos5420.dtsi187 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
725 clocks = <&clock CLK_FIN_PLL>;
1450 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos4210.dtsi114 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos5250-snow-common.dtsi672 assigned-clock-parents = <&clock CLK_FIN_PLL>;
Dexynos4412.dtsi251 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos5800-peach-pi.dts917 assigned-clock-parents = <&clock CLK_FIN_PLL>;
Dexynos4.dtsi70 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
Dexynos5420-peach-pit.dts948 assigned-clock-parents = <&clock CLK_FIN_PLL>;
/Linux-v5.4/drivers/clk/samsung/
Dclk-exynos5250.c225 FRATE(CLK_FIN_PLL, "fin_pll", NULL, 0, 0),
Dclk-exynos3250.c234 FFACTOR(CLK_FIN_PLL, "fin_pll", "xusbxti", 1, 1, 0),
Dclk-exynos4.c1054 fclk.id = CLK_FIN_PLL; in exynos4_clk_register_finpll()
Dclk-exynos5420.c442 FRATE(CLK_FIN_PLL, "fin_pll", NULL, 0, 0),