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Searched refs:ARM_cpsr (Results 1 – 25 of 27) sorted by relevance

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/Linux-v5.4/arch/arm/include/asm/
Dptrace.h28 (((regs)->ARM_cpsr & 0xf) == 0)
32 (((regs)->ARM_cpsr & PSR_T_BIT))
39 ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
40 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
46 ((regs)->ARM_cpsr & MODE_MASK)
49 (!((regs)->ARM_cpsr & PSR_I_BIT))
52 (!((regs)->ARM_cpsr & PSR_F_BIT))
60 unsigned long mode = regs->ARM_cpsr & MODE_MASK; in valid_user_regs()
65 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); in valid_user_regs()
67 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { in valid_user_regs()
[all …]
Dprocessor.h70 regs->ARM_cpsr = USR_MODE; \
72 regs->ARM_cpsr = USR26_MODE; \
74 regs->ARM_cpsr |= PSR_T_BIT; \
75 regs->ARM_cpsr |= PSR_ENDSTATE; \
Dkvm_emulate.h120 return (unsigned long *)&vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr; in vcpu_cpsr()
130 unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK; in mode_has_spsr()
136 unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK; in vcpu_mode_priv()
Dperf_event.h22 (regs)->ARM_cpsr = SVC_MODE; \
Dkexec.h50 [_ARM_cpsr] "=r" (newregs->ARM_cpsr), in crash_setup_regs()
/Linux-v5.4/arch/arm/probes/kprobes/
Dactions-arm.c170 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0rs8_rwflags()
186 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rd12rn16rm0rs8_rwflags()
200 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0_rwflags_nopc()
213 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rd12rn16rm0_rwflags_nopc()
230 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd16rn12rm0rs8_rwflags_nopc()
243 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rd16rn12rm0rs8_rwflags_nopc()
280 unsigned long cpsr = regs->ARM_cpsr; in emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
294 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
Dactions-thumb.c49 regs->uregs[rd] = regs->ARM_cpsr & mask; in t32_simulate_mrs()
97 regs->ARM_cpsr &= ~PSR_T_BIT; in t32_simulate_branch()
221 unsigned long cpsr = regs->ARM_cpsr; in t32_emulate_rd8rn16rm0_rwflags()
234 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in t32_emulate_rd8rn16rm0_rwflags()
388 unsigned long cpsr = regs->ARM_cpsr; in t16_simulate_it()
392 regs->ARM_cpsr = cpsr; in t16_simulate_it()
445 unsigned long oldcpsr = regs->ARM_cpsr; in t16_emulate_loregs()
468 regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs); in t16_emulate_loregs_rwflags()
477 regs->ARM_cpsr = cpsr; in t16_emulate_loregs_noitrwflags()
490 unsigned long cpsr = regs->ARM_cpsr; in t16_emulate_hiregs()
[all …]
Dtest-core.c1122 regs->ARM_cpsr &= ~(APSR_MASK | PSR_IT_MASK); in setup_test_context()
1123 regs->ARM_cpsr |= test_context_cpsr(scenario); in setup_test_context()
1147 regs->ARM_cpsr |= PSR_I_BIT; in setup_test_context()
1203 initial_regs.ARM_cpsr &= ~PSR_IGNORE_BITS; in test_before_post_handler()
1224 result_regs.ARM_cpsr &= ~PSR_IGNORE_BITS; in test_after_pre_handler()
1235 regs->ARM_cpsr &= ~PSR_I_BIT; in test_after_pre_handler()
1276 pr_err("cpsr %08lx\n", regs->ARM_cpsr); in print_registers()
Dcore.c211 regs->ARM_cpsr = it_advance(regs->ARM_cpsr); in singlestep_skip()
257 if (!p->ainsn.insn_check_cc(regs->ARM_cpsr)) { in kprobe_handler()
/Linux-v5.4/arch/arm/probes/
Ddecode-thumb.c849 regs->ARM_cpsr = it_advance(regs->ARM_cpsr); in thumb16_singlestep()
858 regs->ARM_cpsr = it_advance(regs->ARM_cpsr); in thumb32_singlestep()
Ddecode-arm.c73 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx1()
86 regs->ARM_cpsr &= ~PSR_T_BIT; in simulate_blx2bx()
88 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx2bx()
96 regs->uregs[rd] = regs->ARM_cpsr & mask; in simulate_mrs()
Ddecode.h65 long cpsr = regs->ARM_cpsr; in bx_write_pc()
73 regs->ARM_cpsr = cpsr; in bx_write_pc()
/Linux-v5.4/arch/arm/kernel/
Dprocess.c123 regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr); in __show_regs()
136 flags = regs->ARM_cpsr; in __show_regs()
162 printk("xPSR: %08lx\n", regs->ARM_cpsr); in __show_regs()
254 childregs->ARM_cpsr = SVC_MODE; in copy_thread()
Dsignal.c202 regs->ARM_cpsr = context.arm_cpsr; in restore_sigframe()
311 .arm_cpsr = regs->ARM_cpsr, in setup_sigframe()
369 unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); in setup_return()
482 regs->ARM_cpsr = cpsr; in setup_return()
Dtraps.c429 (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) in call_undef_hook()
629 regs->ARM_cpsr &= ~MODE32_BIT; in arm_syscall()
635 regs->ARM_cpsr |= MODE32_BIT; in arm_syscall()
Dswp_emulate.c166 res = arm_check_condition(instr, regs->ARM_cpsr); in swp_handler()
Dkgdb.c48 { "cpsr", 4, offsetof(struct pt_regs, ARM_cpsr)},
/Linux-v5.4/arch/arm/kvm/hyp/
Dbanked-sr.c22 ctxt->gp_regs.usr_regs.ARM_cpsr = read_special(SPSR); in __banked_save_state()
49 write_special(ctxt->gp_regs.usr_regs.ARM_cpsr, SPSR_cxsf); in __banked_restore_state()
/Linux-v5.4/arch/arm/mm/
Dextable.c17 regs->ARM_cpsr &= ~PSR_IT_MASK; in fixup_exception()
/Linux-v5.4/arch/arm/include/asm/xen/
Devents.h17 return raw_irqs_disabled_flags(regs->ARM_cpsr); in xen_irqs_disabled()
/Linux-v5.4/arch/arm/nwfpe/
Dfpmodule.inl72 rval = regs->ARM_cpsr & ~CC_MASK;
73 regs->ARM_cpsr = rval | (val & CC_MASK);
/Linux-v5.4/arch/arm/kvm/
Dreset.c26 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
Dguest.c77 if (off == KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr)) { in set_core_reg()
/Linux-v5.4/arch/arm/include/uapi/asm/
Dptrace.h135 #define ARM_cpsr uregs[16] macro
/Linux-v5.4/arch/arm/probes/uprobes/
Dcore.c38 if (!auprobe->asi.insn_check_cc(regs->ARM_cpsr)) { in arch_uprobe_ignore()

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