Searched refs:A9 (Results 1 – 25 of 72) sorted by relevance
123
| /Linux-v5.4/arch/c6x/lib/ |
| D | csum_64plus.S | 28 ZERO .D1 A9 ; csum (a side)
51 || ADD .L1 A16,A9,A9
57 || ADD .L1X A9,B9,A9 ; add csum from a and b sides
74 ADD .L1 A16,A9,A9
77 || ADD .L1 A8,A9,A9
93 ADD .S1 A8,A9,A9
95 || ADD .S1 A0,A9,A9
103 ADD .S1 A7,A9,A9
107 || ADD .S1 A0,A9,A9
127 ADD .S1 A7,A9,A9
[all …]
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| D | memcpy_64plus.S | 22 [B0] LDNW .D2T1 *B4++,A9
30 [B0] STNW .D1T1 A9,*A3++ ; return when len < 8
34 LDNDW .D2T1 *B4++,A9:A8
39 || STNDW .D1T1 A9:A8,*A3++
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| D | strasgi.S | 22 ldw .d2t1 *B4++, A9
53 || mv .s2x A9, B5
56 [B0] ldw .d2t1 *B4++, A9
74 [B0] stw .d1t1 A9, *A4++
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | calxeda.txt | 10 "calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
11 A9 clock.
12 "calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
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| /Linux-v5.4/arch/arm/mach-prima2/ |
| D | Kconfig | 21 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
25 Support for CSR SiRFSoC ARM Cortex A9 Platform
38 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
44 Support for CSR SiRFSoC ARM Cortex A9 Platform
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/ |
| D | scu.txt | 3 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
9 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
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| /Linux-v5.4/arch/arm/mach-artpec/ |
| D | Kconfig | 9 bool "Axis ARTPEC-6 ARM Cortex A9 Platform"
20 Support for Axis ARTPEC-6 ARM Cortex A9 Platform
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| /Linux-v5.4/arch/arm/mach-zynq/ |
| D | Kconfig | 3 bool "Xilinx Zynq ARM Cortex A9 Platform"
19 Support for Xilinx Zynq ARM Cortex A9 Platform
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| /Linux-v5.4/arch/arm/include/debug/ |
| D | vexpress.S | 26 @ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
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| /Linux-v5.4/arch/arm/mach-vexpress/ |
| D | Kconfig | 34 - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
45 bool "Enable A5 and A9 only errata work-arounds"
52 based on Cortex-A5 and Cortex-A9 processors. In order to
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | arm-realview-eb-a9mp.dts | 27 model = "ARM RealView EB Cortex A9 MPCore";
30 * This is the Cortex A9 MPCore tile used with the
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| D | vexpress-v2p-ca9.dts | 6 * Cortex-A9 MPCore (V2P-CA9)
234 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
277 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
291 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
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| D | arm-realview-pbx-a9.dts | 28 * This is the RealView Platform Baseboard Explore for Cortex-A9
31 model = "ARM RealView Platform Baseboard Explore for Cortex-A9";
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| /Linux-v5.4/Documentation/arm/sti/ |
| D | stih415-overview.rst | 13 - ARM Cortex-A9 1.0 GHz, dual-core CPU
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| D | stih416-overview.rst | 12 - ARM Cortex-A9 1.2 GHz dual core CPU
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| D | stih407-overview.rst | 13 - ARM Cortex-A9 1.5 GHz dual core CPU (28nm)
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| D | stih418-overview.rst | 13 - ARM Cortex-A9 1.5 GHz quad core CPU (28nm)
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| /Linux-v5.4/arch/arm/mach-tango/ |
| D | Kconfig | 5 # Cortex-A9 MPCore r3p0, PL310 r3p2
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,hr2.txt | 6 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
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| D | brcm,nsp.txt | 6 applications. The SoC features dual core Cortex A9 ARM CPUs, integrating
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| /Linux-v5.4/Documentation/admin-guide/device-mapper/ |
| D | dm-raid.rst | 146 A5 A6 A7 A8 A9 A9 A10 A11 A12
150 A6 A5 A9 A7 A8 A10 A9 A12 A11
164 A5 A6 A7 A8 A9 A9 A10 A11 A12
165 A6 A5 A9 A7 A8 A10 A9 A12 A11
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| /Linux-v5.4/arch/arm/mach-rockchip/ |
| D | Kconfig | 23 Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
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| /Linux-v5.4/arch/arm/mach-npcm/ |
| D | Kconfig | 29 Nuvoton NPCM7xx BMC based on the Cortex A9.
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| /Linux-v5.4/arch/arm/mach-realview/ |
| D | Kconfig | 57 bool "Support Multicore Cortex-A9 Tile"
104 bool "Support RealView(R) Platform Baseboard Explore for Cortex-A9"
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| /Linux-v5.4/arch/arm/mach-tegra/ |
| D | reset-handler.S | 149 # Tegra20 is a Cortex-A9 r1p1
165 # Tegra30 is a Cortex-A9 r2p9
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