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/Linux-v5.4/arch/c6x/lib/
Dcsum_64plus.S33 AND .S1 3,A4,A1
35 OR .L2X B0,A1,B0 ; non aligned condition
38 || MV .D1X B5,A1 ; words condition
39 [!A1] B .S1 L8
56 ZERO .D1 A1
60 [!A1] BNOP .S1 L8,5
297 || ZERO .D1 A1
301 || [A0] LDBU .D1T1 *A4++,A1
306 || SHL .S1 A0,8,A1
318 || ADD .L1 A0,A1,A1
[all …]
Ddivi.S10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
12 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
13 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
29 || cmpgt .l1 0, A4, A1
32 [A1] neg .l1 A4, A4
34 || xor .s1x A1, B1, A1
35 [A1] addkpc .s2 _divu_ret, B3, 4
Dllshl.S12 mv .l1x B4,A1
13 [!A1] b .s2 B3 ; just return if zero shift
15 sub .d1 A0,A1,A0
19 || [A2] shl .s1 A5,A1,A5
23 [A2] shl .s1 A4,A1,A4
Dllshru.S12 mv .l1x B4,A1
13 [!A1] b .s2 B3 ; return if zero shift count
15 sub .d1 A0,A1,A0
20 || [A2] shru .s1 A4,A1,A4
24 [A2] shru .s1 A5,A1,A5
Dremi.S10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
12 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
13 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
29 || cmpgt .l1 0, A4, A1
34 [A1] neg .l1 A4, A4
36 || xor .s2x B2, A1, B0
Dllshr.S12 mv .l1x B4,A1
13 [!A1] b .s2 B3 ; return if zero shift count
15 sub .d1 A0,A1,A0
20 || [A2] shru .s1 A4,A1,A4
24 [A2] shr .s1 A5,A1,A5
Dmemcpy_64plus.S14 || AND .S1 0x2,A6,A1
20 [A1] LDB .D2T1 *B4++,A7
21 [A1] LDB .D2T1 *B4++,A8
28 [A1] STB .D1T1 A7,*A3++
29 [A1] STB .D1T1 A8,*A3++
Dremu.S10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
12 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
13 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
39 cmpltu .l1x A4, B4, A1
40 [!A1] sub .l1x A4, B4, A4
Ddivremi.S11 || cmpgt .l1 0, A4, A1
16 [A1] neg .l1 A4, A4
18 || xor .s2x B2, A1, B0
Ddivu.S10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
12 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
13 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
78 || mvk .s1 32, A1
79 sub .l1 A1, A6, A6
Dstrasgi.S15 ldw .d2t1 *B4++, A1
29 || mv .s2x A1, B5
36 [B0] ldw .d2t1 *B4++, A1
66 [B0] stw .d1t1 A1, *A4++
Dmpyll.S28 mpy32u .m1x A4,B4,A1:A0 ; X0*Y0
36 add .s1 A1,A5,A5
/Linux-v5.4/tools/testing/selftests/ftrace/test.d/kprobe/
Dprobepoint.tc14 A1=`dec_addr $1`
18 PREV=`expr $A1 - $A2` # offset to previous symbol
25 set_offs `grep -A1 -B1 ${TARGET_FUNC} /proc/kallsyms | cut -f 1 -d " " | xargs`
/Linux-v5.4/scripts/kconfig/tests/auto_submenu/
DKconfig21 config A1 config
22 bool "A1"
30 depends on A1
Dexpected_stdout4 A1 (A1) [Y/n/?] (NEW)
/Linux-v5.4/arch/mips/mm/
Dpage.c43 #define A1 5 macro
370 uasm_i_ld(buf, reg, off, A1); in build_copy_load()
372 uasm_i_lw(buf, reg, off, A1); in build_copy_load()
391 _uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, A1); in build_copy_load_pref()
492 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
537 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
575 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
/Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/
Drenesas,rza1-irqc.txt1 DT bindings for the Renesas RZ/A1 Interrupt Controller
3 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
4 RZ/A1 and RZ/A2 SoCs:
/Linux-v5.4/Documentation/admin-guide/device-mapper/
Ddm-raid.rst126 A1 A1 A1 A1 A2 A1 A1 A2 A2
144 A1 A2 A1 A2 A3 A1 A2 A3 A4
148 A2 A1 A3 A1 A2 A2 A1 A4 A3
160 A1 A2 A1 A2 A3 A1 A2 A3 A4
161 A2 A1 A3 A1 A2 A2 A1 A4 A3
/Linux-v5.4/arch/arm/boot/dts/
Darmada-388-clearfog-pro.dts3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
10 model = "SolidRun Clearfog Pro A1";
Darmada-388-clearfog-base.dts3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
/Linux-v5.4/arch/m68k/fpsp040/
Dsatan.S317 |--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
319 |--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
320 |--WHAT WE HAVE HERE IS MERELY A1 = A3, A2 = A1/A3, A3 = A2/A3.
322 |--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
332 fmuld ATANA1,%fp1 | ...A1*U*V
333 fmulx %fp2,%fp1 | ...A1*U*V*(A2+V*(A3+V))
/Linux-v5.4/arch/c6x/kernel/
Dentry.S91 || STDW .D1T1 A1:A0,*A15--[1]
148 LDDW .D1T1 *++A15[1],A1:A0
255 MVKL .S1 schedule,A1
256 MVKH .S1 schedule,A1
257 B .S2X A1
310 MVK .S1 _TIF_WORK_MASK,A1
313 AND .D1 A1,A2,A0
Dswitch_to.S50 || LDDW .D1T1 *+A5(THREAD_RICL_ICL),A1:A0
68 || MV .L2X A1,B1
/Linux-v5.4/tools/perf/arch/csky/util/
Dunwind-libdw.c23 dwarf_regs[1] = REG(A1); in libdw__arch_set_initial_registers()
59 dwarf_regs[3] = REG(A1); in libdw__arch_set_initial_registers()
/Linux-v5.4/Documentation/devicetree/bindings/pwm/
Drenesas,tpu-pwm.txt7 - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
29 Example: R8A7740 (R-Mobile A1) TPU controller node

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