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Searched refs:rlc (Results 1 – 22 of 22) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Damdgpu_rlc.c39 if (adev->gfx.rlc.in_safe_mode) in amdgpu_gfx_rlc_enter_safe_mode()
43 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_enter_safe_mode()
49 adev->gfx.rlc.funcs->set_safe_mode(adev); in amdgpu_gfx_rlc_enter_safe_mode()
50 adev->gfx.rlc.in_safe_mode = true; in amdgpu_gfx_rlc_enter_safe_mode()
63 if (!(adev->gfx.rlc.in_safe_mode)) in amdgpu_gfx_rlc_exit_safe_mode()
67 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_exit_safe_mode()
73 adev->gfx.rlc.funcs->unset_safe_mode(adev); in amdgpu_gfx_rlc_exit_safe_mode()
74 adev->gfx.rlc.in_safe_mode = false; in amdgpu_gfx_rlc_exit_safe_mode()
97 &adev->gfx.rlc.save_restore_obj, in amdgpu_gfx_rlc_init_sr()
98 &adev->gfx.rlc.save_restore_gpu_addr, in amdgpu_gfx_rlc_init_sr()
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Dsoc15_common.h31 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.funcs->sriov_wreg) ? \
32 adev->gfx.rlc.funcs->sriov_wreg(adev, reg, value, flag, hwip) : \
36 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.funcs->sriov_rreg) ? \
37 adev->gfx.rlc.funcs->sriov_rreg(adev, reg, flag, hwip) : \
Damdgpu_ucode.c648 ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; in amdgpu_ucode_init_single_fw()
649 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_cntl, in amdgpu_ucode_init_single_fw()
652 ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; in amdgpu_ucode_init_single_fw()
653 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_gpm, in amdgpu_ucode_init_single_fw()
656 ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; in amdgpu_ucode_init_single_fw()
657 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm, in amdgpu_ucode_init_single_fw()
660 ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
661 memcpy(ucode->kaddr, adev->gfx.rlc.rlc_iram_ucode, in amdgpu_ucode_init_single_fw()
664 ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
665 memcpy(ucode->kaddr, adev->gfx.rlc.rlc_dram_ucode, in amdgpu_ucode_init_single_fw()
Dgfx_v7_0.c2556 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v7_0_cp_gfx_start()
3307 adev->gfx.rlc.reg_list = spectre_rlc_save_restore_register_list; in gfx_v7_0_rlc_init()
3308 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3311 adev->gfx.rlc.reg_list = kalindi_rlc_save_restore_register_list; in gfx_v7_0_rlc_init()
3312 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3316 adev->gfx.rlc.cs_data = ci_cs_data; in gfx_v7_0_rlc_init()
3317 adev->gfx.rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ in gfx_v7_0_rlc_init()
3318 adev->gfx.rlc.cp_table_size += 64 * 1024; /* GDS */ in gfx_v7_0_rlc_init()
3320 src_ptr = adev->gfx.rlc.reg_list; in gfx_v7_0_rlc_init()
3321 dws = adev->gfx.rlc.reg_list_size; in gfx_v7_0_rlc_init()
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Dgfx_v9_0.c1167 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_0_free_microcode()
1177 …adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size… in gfx_v9_0_init_rlc_ext_microcode()
1178 …adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl… in gfx_v9_0_init_rlc_ext_microcode()
1181 …adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_b… in gfx_v9_0_init_rlc_ext_microcode()
1182 …adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_o… in gfx_v9_0_init_rlc_ext_microcode()
1185 …adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_b… in gfx_v9_0_init_rlc_ext_microcode()
1186 …adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_o… in gfx_v9_0_init_rlc_ext_microcode()
1187 adev->gfx.rlc.reg_list_format_direct_reg_list_length = in gfx_v9_0_init_rlc_ext_microcode()
1324 !adev->gfx.rlc.is_rlc_v2_1)) in gfx_v9_0_check_if_need_gfxoff()
1466 adev->gfx.rlc.is_rlc_v2_1 = true; in gfx_v9_0_init_rlc_microcode()
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Dgfx_v6_0.c2058 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v6_0_cp_gfx_start()
2380 adev->gfx.rlc.reg_list = verde_rlc_save_restore_register_list; in gfx_v6_0_rlc_init()
2381 adev->gfx.rlc.reg_list_size = in gfx_v6_0_rlc_init()
2384 adev->gfx.rlc.cs_data = si_cs_data; in gfx_v6_0_rlc_init()
2385 src_ptr = adev->gfx.rlc.reg_list; in gfx_v6_0_rlc_init()
2386 dws = adev->gfx.rlc.reg_list_size; in gfx_v6_0_rlc_init()
2387 cs_data = adev->gfx.rlc.cs_data; in gfx_v6_0_rlc_init()
2398 adev->gfx.rlc.clear_state_size = gfx_v6_0_get_csb_size(adev); in gfx_v6_0_rlc_init()
2399 dws = adev->gfx.rlc.clear_state_size + (256 / 4); in gfx_v6_0_rlc_init()
2403 &adev->gfx.rlc.clear_state_obj, in gfx_v6_0_rlc_init()
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Dgfx_v8_0.c956 kfree(adev->gfx.rlc.register_list_format); in gfx_v8_0_free_microcode()
1085 adev->gfx.rlc.save_and_restore_offset = in gfx_v8_0_init_microcode()
1087 adev->gfx.rlc.clear_state_descriptor_offset = in gfx_v8_0_init_microcode()
1089 adev->gfx.rlc.avail_scratch_ram_locations = in gfx_v8_0_init_microcode()
1091 adev->gfx.rlc.reg_restore_list_size = in gfx_v8_0_init_microcode()
1093 adev->gfx.rlc.reg_list_format_start = in gfx_v8_0_init_microcode()
1095 adev->gfx.rlc.reg_list_format_separate_start = in gfx_v8_0_init_microcode()
1097 adev->gfx.rlc.starting_offsets_start = in gfx_v8_0_init_microcode()
1099 adev->gfx.rlc.reg_list_format_size_bytes = in gfx_v8_0_init_microcode()
1101 adev->gfx.rlc.reg_list_size_bytes = in gfx_v8_0_init_microcode()
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Dgfx_v10_0.c3981 kfree(adev->gfx.rlc.register_list_format); in gfx_v10_0_free_microcode()
4025 …adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size… in gfx_v10_0_init_rlc_ext_microcode()
4026 …adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl… in gfx_v10_0_init_rlc_ext_microcode()
4029 …adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_b… in gfx_v10_0_init_rlc_ext_microcode()
4030 …adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_o… in gfx_v10_0_init_rlc_ext_microcode()
4033 …adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_b… in gfx_v10_0_init_rlc_ext_microcode()
4034 …adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_o… in gfx_v10_0_init_rlc_ext_microcode()
4035 adev->gfx.rlc.reg_list_format_direct_reg_list_length = in gfx_v10_0_init_rlc_ext_microcode()
4044 adev->gfx.rlc.rlc_iram_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlc_iram_ucode_size_bytes); in gfx_v10_0_init_rlc_iram_dram_microcode()
4045 adev->gfx.rlc.rlc_iram_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlc_iram_ucode_offset_bytes); in gfx_v10_0_init_rlc_iram_dram_microcode()
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Damdgpu_ucode.h329 struct rlc_firmware_header_v1_0 rlc; member
Daldebaran.c260 adev->gfx.rlc.funcs->resume(adev); in aldebaran_mode2_restore_ip()
Damdgpu_gfx.h273 struct amdgpu_rlc rlc; member
Damdgpu_device.c564 adev->gfx.rlc.funcs && in amdgpu_mm_wreg_mmio_rlc()
565 adev->gfx.rlc.funcs->is_rlcg_access_range) { in amdgpu_mm_wreg_mmio_rlc()
566 if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg)) in amdgpu_mm_wreg_mmio_rlc()
567 return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0, 0); in amdgpu_mm_wreg_mmio_rlc()
Damdgpu_vm.c1182 if (update_spm_vmid_needed && adev->gfx.rlc.funcs->update_spm_vmid) in amdgpu_vm_flush()
1183 adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid); in amdgpu_vm_flush()
/Linux-v5.15/drivers/gpu/drm/radeon/
Devergreen.c4116 if (rdev->rlc.save_restore_obj) { in sumo_rlc_fini()
4117 r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false); in sumo_rlc_fini()
4120 radeon_bo_unpin(rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4121 radeon_bo_unreserve(rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4123 radeon_bo_unref(&rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4124 rdev->rlc.save_restore_obj = NULL; in sumo_rlc_fini()
4128 if (rdev->rlc.clear_state_obj) { in sumo_rlc_fini()
4129 r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); in sumo_rlc_fini()
4132 radeon_bo_unpin(rdev->rlc.clear_state_obj); in sumo_rlc_fini()
4133 radeon_bo_unreserve(rdev->rlc.clear_state_obj); in sumo_rlc_fini()
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Dradeon_ucode.h215 struct rlc_firmware_header_v1_0 rlc; member
Dcik.c5806 static void cik_update_rlc(struct radeon_device *rdev, u32 rlc) in cik_update_rlc() argument
5811 if (tmp != rlc) in cik_update_rlc()
5812 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
6420 if (rdev->rlc.cp_table_ptr == NULL) in cik_init_cp_pg_table()
6424 dst_ptr = rdev->rlc.cp_table_ptr; in cik_init_cp_pg_table()
6616 if (rdev->rlc.cs_data) { in cik_init_gfx_cgpg()
6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6620 WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.clear_state_size); in cik_init_gfx_cgpg()
6626 if (rdev->rlc.reg_list) { in cik_init_gfx_cgpg()
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Dsi.c5216 static void si_update_rlc(struct radeon_device *rdev, u32 rlc) in si_update_rlc() argument
5221 if (tmp != rlc) in si_update_rlc()
5222 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5278 WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); in si_init_gfx_cgpg()
5284 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_gfx_cgpg()
5684 if (rdev->rlc.cs_data == NULL) in si_get_csb_size()
5692 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_size()
5716 if (rdev->rlc.cs_data == NULL) in si_get_csb_buffer()
5728 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_buffer()
5780 WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); in si_init_pg()
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Dni.c2177 rdev->rlc.reg_list = tn_rlc_save_restore_register_list; in cayman_startup()
2178 rdev->rlc.reg_list_size = in cayman_startup()
2180 rdev->rlc.cs_data = cayman_cs_data; in cayman_startup()
Dradeon.h2445 struct radeon_rlc rlc; member
/Linux-v5.15/arch/arc/lib/
Dstrcmp.S77 rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
/Linux-v5.15/drivers/media/test-drivers/vicodec/
Dcodec-fwht.c55 rlc(const s16 *in, __be16 *output, int blocktype) in rlc() function
732 size = rlc(cf->coeffs, *rlco, blocktype); in encode_plane()
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c1440 adev->gfx.rlc.funcs->stop) in smu_disable_dpms()
1441 adev->gfx.rlc.funcs->stop(adev); in smu_disable_dpms()