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Searched refs:pipe_config (Results 1 – 25 of 55) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/i915/display/
Dg4x_hdmi.c80 struct intel_crtc_state *pipe_config) in intel_hdmi_get_config() argument
88 pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI); in intel_hdmi_get_config()
103 pipe_config->has_hdmi_sink = true; in intel_hdmi_get_config()
105 pipe_config->infoframes.enable |= in intel_hdmi_get_config()
106 intel_hdmi_infoframes_enabled(encoder, pipe_config); in intel_hdmi_get_config()
108 if (pipe_config->infoframes.enable) in intel_hdmi_get_config()
109 pipe_config->has_infoframe = true; in intel_hdmi_get_config()
112 pipe_config->has_audio = true; in intel_hdmi_get_config()
116 pipe_config->limited_color_range = true; in intel_hdmi_get_config()
118 pipe_config->hw.adjusted_mode.flags |= flags; in intel_hdmi_get_config()
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Dg4x_dp.c71 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
93 if (pipe_config->port_clock == divisor[i].clock) { in g4x_dp_set_clock()
94 pipe_config->dpll = divisor[i].dpll; in g4x_dp_set_clock()
95 pipe_config->clock_set = true; in g4x_dp_set_clock()
103 const struct intel_crtc_state *pipe_config) in intel_dp_prepare() argument
108 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_prepare()
109 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_prepare()
112 pipe_config->port_clock, in intel_dp_prepare()
113 pipe_config->lane_count); in intel_dp_prepare()
138 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
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Dintel_dp_mst.c103 struct intel_crtc_state *pipe_config, in intel_dp_mst_compute_config() argument
114 &pipe_config->hw.adjusted_mode; in intel_dp_mst_compute_config()
121 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
122 pipe_config->has_pch_encoder = false; in intel_dp_mst_compute_config()
125 pipe_config->has_audio = connector->port->has_audio; in intel_dp_mst_compute_config()
127 pipe_config->has_audio = in intel_dp_mst_compute_config()
140 limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format); in intel_dp_mst_compute_config()
149 limits.max_bpp = min(pipe_config->pipe_bpp, 24); in intel_dp_mst_compute_config()
151 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); in intel_dp_mst_compute_config()
153 ret = intel_dp_mst_compute_link_config(encoder, pipe_config, in intel_dp_mst_compute_config()
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Dintel_dpll.c1113 struct intel_crtc_state *pipe_config) in vlv_compute_dpll() argument
1115 pipe_config->dpll_hw_state.dpll = DPLL_INTEGRATED_REF_CLK_VLV | in vlv_compute_dpll()
1118 pipe_config->dpll_hw_state.dpll |= DPLL_INTEGRATED_CRI_CLK_VLV; in vlv_compute_dpll()
1121 if (!intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DSI)) in vlv_compute_dpll()
1122 pipe_config->dpll_hw_state.dpll |= DPLL_VCO_ENABLE | in vlv_compute_dpll()
1125 pipe_config->dpll_hw_state.dpll_md = in vlv_compute_dpll()
1126 (pipe_config->pixel_multiplier - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT; in vlv_compute_dpll()
1130 struct intel_crtc_state *pipe_config) in chv_compute_dpll() argument
1132 pipe_config->dpll_hw_state.dpll = DPLL_SSC_REF_CLK_CHV | in chv_compute_dpll()
1135 pipe_config->dpll_hw_state.dpll |= DPLL_INTEGRATED_CRI_CLK_VLV; in chv_compute_dpll()
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Dintel_dpll.h22 struct intel_crtc_state *pipe_config);
24 struct intel_crtc_state *pipe_config);
32 const struct intel_crtc_state *pipe_config);
34 const struct intel_crtc_state *pipe_config);
39 const struct intel_crtc_state *pipe_config);
41 const struct intel_crtc_state *pipe_config);
Dintel_display.c109 struct intel_crtc_state *pipe_config);
111 struct intel_crtc_state *pipe_config);
4521 struct intel_crtc_state *pipe_config) in intel_crtc_compute_config() argument
4524 struct drm_display_mode *pipe_mode = &pipe_config->hw.pipe_mode; in intel_crtc_compute_config()
4527 drm_mode_copy(pipe_mode, &pipe_config->hw.adjusted_mode); in intel_crtc_compute_config()
4530 if (pipe_config->bigjoiner) { in intel_crtc_compute_config()
4538 pipe_config->pipe_src_w /= 2; in intel_crtc_compute_config()
4541 if (pipe_config->splitter.enable) { in intel_crtc_compute_config()
4542 int n = pipe_config->splitter.link_count; in intel_crtc_compute_config()
4543 int overlap = pipe_config->splitter.pixel_overlap; in intel_crtc_compute_config()
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Dintel_lvds.c120 struct intel_crtc_state *pipe_config) in intel_lvds_get_config() argument
126 pipe_config->output_types |= BIT(INTEL_OUTPUT_LVDS); in intel_lvds_get_config()
138 pipe_config->hw.adjusted_mode.flags |= flags; in intel_lvds_get_config()
141 pipe_config->gmch_pfit.lvds_border_bits = in intel_lvds_get_config()
148 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; in intel_lvds_get_config()
151 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_lvds_get_config()
226 const struct intel_crtc_state *pipe_config, in intel_pre_enable_lvds() argument
231 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_pre_enable_lvds()
232 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_pre_enable_lvds()
239 pipe_config->shared_dpll); in intel_pre_enable_lvds()
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Dintel_crt.c134 struct intel_crtc_state *pipe_config) in intel_crt_get_config() argument
136 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
138 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
140 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
144 struct intel_crtc_state *pipe_config) in hsw_crt_get_config() argument
148 hsw_ddi_get_config(encoder, pipe_config); in hsw_crt_get_config()
150 pipe_config->hw.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
154 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
156 pipe_config->hw.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv); in hsw_crt_get_config()
385 struct intel_crtc_state *pipe_config, in intel_crt_compute_config() argument
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Dintel_dp.c905 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument
913 if (DISPLAY_VER(dev_priv) == 11 && pipe_config->cpu_transcoder != TRANSCODER_A) in intel_dp_source_supports_fec()
920 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument
922 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec()
1019 struct intel_crtc_state *pipe_config, in intel_dp_adjust_compliance_config() argument
1029 pipe_config->dither_force_disable = bpp == 6 * 3; in intel_dp_adjust_compliance_config()
1057 struct intel_crtc_state *pipe_config, in intel_dp_compute_link_config_wide() argument
1060 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_compute_link_config_wide()
1065 int output_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp); in intel_dp_compute_link_config_wide()
1079 pipe_config->lane_count = lane_count; in intel_dp_compute_link_config_wide()
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Dintel_fdi.c21 struct intel_crtc_state *pipe_config) in ilk_check_fdi_lanes() argument
24 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
30 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
31 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
34 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
39 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
42 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
57 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
69 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
74 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
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Dintel_dvo.c164 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
170 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
182 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
184 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
204 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
213 &pipe_config->hw.mode, in intel_enable_dvo()
214 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
253 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_compute_config()
273 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config()
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Dintel_ddi.c317 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument
321 if (pipe_config->has_pch_encoder) in ddi_dotclock_get()
322 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
323 &pipe_config->fdi_m_n); in ddi_dotclock_get()
324 else if (intel_crtc_has_dp_encoder(pipe_config)) in ddi_dotclock_get()
325 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
326 &pipe_config->dp_m_n); in ddi_dotclock_get()
327 else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24) in ddi_dotclock_get()
328 dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp; in ddi_dotclock_get()
330 dotclock = pipe_config->port_clock; in ddi_dotclock_get()
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Dvlv_dsi.c266 struct intel_crtc_state *pipe_config, in intel_dsi_compute_config() argument
274 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config()
278 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
284 ret = intel_gmch_panel_fitting(pipe_config, conn_state); in intel_dsi_compute_config()
286 ret = intel_pch_panel_fitting(pipe_config, conn_state); in intel_dsi_compute_config()
298 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
300 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
304 pipe_config->mode_flags |= in intel_dsi_compute_config()
309 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
311 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
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Dicl_dsi.c305 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
318 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
728 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
732 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in gen11_dsi_configure_transcoder()
748 if (afe_clk(encoder, pipe_config) >= 1500 * 1000) { in gen11_dsi_configure_transcoder()
774 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
844 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
1238 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_enable() argument
1242 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable()
1245 gen11_dsi_enable_port_and_phy(encoder, pipe_config); in gen11_dsi_pre_enable()
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Dintel_pipe_crc.c291 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local
307 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds()
308 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds()
309 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds()
313 pipe_config->uapi.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds()
314 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds()
317 pipe_config->hw.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds()
318 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
319 pipe_config->uapi.mode_changed = true; in intel_crtc_crc_setup_workarounds()
Dintel_sdvo.c1254 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1256 struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev); in i9xx_adjust_sdvo_tv_clock()
1257 unsigned dotclock = pipe_config->port_clock; in i9xx_adjust_sdvo_tv_clock()
1258 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1281 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1304 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1312 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_sdvo_compute_config()
1313 struct drm_display_mode *mode = &pipe_config->hw.mode; in intel_sdvo_compute_config()
1316 pipe_config->pipe_bpp = 8*3; in intel_sdvo_compute_config()
1317 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_sdvo_compute_config()
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Dintel_hdmi.c252 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument
328 const struct intel_crtc_state *pipe_config) in ibx_infoframes_enabled() argument
331 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in ibx_infoframes_enabled()
410 const struct intel_crtc_state *pipe_config) in cpt_infoframes_enabled() argument
413 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in cpt_infoframes_enabled()
487 const struct intel_crtc_state *pipe_config) in vlv_infoframes_enabled() argument
490 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in vlv_infoframes_enabled()
561 const struct intel_crtc_state *pipe_config) in hsw_infoframes_enabled() argument
565 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()
2179 struct intel_crtc_state *pipe_config, in intel_hdmi_compute_config() argument
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Dintel_lspcon.h35 const struct intel_crtc_state *pipe_config);
37 const struct intel_crtc_state *pipe_config);
Dintel_tv.c920 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
928 to_intel_crtc(pipe_config->uapi.crtc)->pipe); in intel_enable_tv()
1085 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1089 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1097 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1119 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1162 pipe_config->mode_flags |= in intel_tv_get_config()
1184 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1192 &pipe_config->hw.adjusted_mode; in intel_tv_compute_config()
1202 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_tv_compute_config()
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Dintel_dp.h35 struct intel_crtc_state *pipe_config,
58 struct intel_crtc_state *pipe_config,
Dintel_fdi.h16 struct intel_crtc_state *pipe_config);
Dintel_lspcon.c601 const struct intel_crtc_state *pipe_config) in lspcon_infoframes_enabled() argument
620 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled()
666 const struct intel_crtc_state *pipe_config) in intel_lspcon_infoframes_enabled() argument
670 return dig_port->infoframes_enabled(encoder, pipe_config); in intel_lspcon_infoframes_enabled()
Dg4x_dp.h23 struct intel_crtc_state *pipe_config);
Dintel_vdsc.h20 struct intel_crtc_state *pipe_config);
/Linux-v5.15/drivers/usb/renesas_usbhs/
Dpipe.c477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()

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