| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_mpc.c | 42 int mpcc_id) in mpc1_set_bg_color() argument
45 struct mpcc *bottommost_mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_set_bg_color()
63 REG_SET(MPCC_BG_R_CR[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color()
65 REG_SET(MPCC_BG_G_Y[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color()
67 REG_SET(MPCC_BG_B_CB[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color()
74 int mpcc_id) in mpc1_update_blending() argument
77 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_update_blending()
79 REG_UPDATE_5(MPCC_CONTROL[mpcc_id], in mpc1_update_blending()
92 int mpcc_id) in mpc1_update_stereo_mix() argument
96 REG_UPDATE_6(MPCC_SM_CONTROL[mpcc_id], in mpc1_update_stereo_mix()
[all …]
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| D | dcn10_mpc.h | 148 int mpcc_id);
160 unsigned int mpcc_id);
174 int mpcc_id);
178 int mpcc_id);
182 int mpcc_id);
190 int mpcc_id);
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| D | dcn10_hw_sequencer.c | 1279 hubp->mpcc_id = dpp->inst; in dcn10_init_pipes()
2430 …visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, struct tg_color *color, int mpcc_id) in dcn10_update_visual_confirm_color() argument
2445 mpc->funcs->set_bg_color(mpc, color, mpcc_id); in dcn10_update_visual_confirm_color()
2453 int mpcc_id; in dcn10_update_mpcc() local
2487 mpcc_id = hubp->inst; in dcn10_update_mpcc()
2491 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn10_update_mpcc()
2492 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, &blnd_cfg.black_color, mpcc_id); in dcn10_update_mpcc()
2497 new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id); in dcn10_update_mpcc()
2504 dc->res_pool->mpc, mpcc_id); in dcn10_update_mpcc()
2513 mpcc_id); in dcn10_update_mpcc()
[all …]
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| D | dcn10_hw_sequencer.h | 207 int mpcc_id);
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| D | dcn10_hubp.c | 65 hubp->mpcc_id = 0xf; in hubp1_set_blank()
1369 hubp1->base.mpcc_id = 0xf; in dcn10_hubp_construct()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 51 int mpcc_id) in mpc2_update_blending() argument
55 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc2_update_blending()
57 REG_UPDATE_7(MPCC_CONTROL[mpcc_id], in mpc2_update_blending()
66 REG_SET(MPCC_TOP_GAIN[mpcc_id], 0, MPCC_TOP_GAIN, blnd_cfg->top_gain); in mpc2_update_blending()
67 REG_SET(MPCC_BOT_GAIN_INSIDE[mpcc_id], 0, MPCC_BOT_GAIN_INSIDE, blnd_cfg->bottom_inside_gain); in mpc2_update_blending()
68 REG_SET(MPCC_BOT_GAIN_OUTSIDE[mpcc_id], 0, MPCC_BOT_GAIN_OUTSIDE, blnd_cfg->bottom_outside_gain); in mpc2_update_blending()
273 struct mpc *mpc, int mpcc_id, in mpc20_power_on_ogam_lut() argument
278 REG_SET(MPCC_MEM_PWR_CTRL[mpcc_id], 0, in mpc20_power_on_ogam_lut()
284 struct mpc *mpc, int mpcc_id, in mpc20_configure_ogam_lut() argument
289 REG_UPDATE_2(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], in mpc20_configure_ogam_lut()
[all …]
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| D | dcn20_mpc.h | 280 int mpcc_id);
306 int mpcc_id,
310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
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| D | dcn20_hwseq.c | 773 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_program_output_csc() local
776 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_program_output_csc()
796 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_set_output_transfer_func() local
807 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_set_output_transfer_func()
827 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn20_set_output_transfer_func()
2272 …visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, struct tg_color *color, int mpcc_id) in dcn20_update_visual_confirm_color() argument
2287 mpc->funcs->set_bg_color(mpc, color, mpcc_id); in dcn20_update_visual_confirm_color()
2295 int mpcc_id; in dcn20_update_mpcc() local
2331 mpcc_id = hubp->inst; in dcn20_update_mpcc()
2336 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn20_update_mpcc()
[all …]
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| D | dcn20_hwseq.h | 152 int mpcc_id);
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| D | dcn20_hubp.c | 955 hubp->mpcc_id = 0xf; in hubp2_set_blank()
1641 hubp2->base.mpcc_id = 0xf; in hubp2_construct()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_mpc.c | 65 int mpcc_id) in mpc3_set_dwb_mux() argument
70 MPC_DWB0_MUX, mpcc_id); in mpc3_set_dwb_mux()
102 static enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id) in mpc3_get_ogam_current() argument
112 REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], in mpc3_get_ogam_current()
141 struct mpc *mpc, int mpcc_id, in mpc3_power_on_ogam_lut() argument
152 REG_UPDATE(MPCC_MEM_PWR_CTRL[mpcc_id], in mpc3_power_on_ogam_lut()
157 REG_WAIT(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_STATE, 0, 10, 10); in mpc3_power_on_ogam_lut()
161 struct mpc *mpc, int mpcc_id, in mpc3_configure_ogam_lut() argument
166 REG_UPDATE_2(MPCC_OGAM_LUT_CONTROL[mpcc_id], in mpc3_configure_ogam_lut()
170 REG_SET(MPCC_OGAM_LUT_INDEX[mpcc_id], 0, MPCC_OGAM_LUT_INDEX, 0); in mpc3_configure_ogam_lut()
[all …]
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| D | dcn30_resource.h | 75 int mpcc_id,
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| D | dcn30_hwseq.c | 96 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_mpc_shaper_3dlut() local
124 if (mpcc_id_projected != mpcc_id) in dcn30_set_mpc_shaper_3dlut()
127 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
138 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut()
191 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_output_transfer_func() local
215 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn30_set_output_transfer_func()
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| D | dcn30_mpc.h | 806 int mpcc_id, int rmu_idx);
832 int mpcc_id,
841 int mpcc_id,
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| D | dcn30_hubp.c | 532 hubp2->base.mpcc_id = 0xf; in hubp3_construct()
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| D | dcn30_resource.c | 1651 int mpcc_id, in dcn30_acquire_post_bldn_3dlut() argument
1672 state->bits.mpc_rmu0_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut()
1674 state->bits.mpc_rmu1_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut()
1676 state->bits.mpc_rmu2_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | mpc.h | 115 int mpcc_id; /* MPCC physical instance */ member
181 int mpcc_id);
209 unsigned int mpcc_id);
224 int mpcc_id);
265 int mpcc_id);
290 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
317 int mpcc_id,
321 int mpcc_id,
326 int mpcc_id);
345 int mpcc_id,
[all …]
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| D | hubp.h | 64 int mpcc_id; member
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_hubp.c | 100 hubp2->base.mpcc_id = 0xf; in hubp31_construct()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/ |
| D | hw_sequencer.h | 245 int mpcc_id);
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| D | core_types.h | 186 int mpcc_id,
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hubp.c | 859 hubp21->base.mpcc_id = 0xf; in hubp21_construct()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc.c | 1731 int mpcc_id = 0; in dc_acquire_release_mpc_3dlut() local
1739 mpcc_id = res_ctx->pipe_ctx[pipe_idx].plane_res.hubp->inst; in dc_acquire_release_mpc_3dlut()
1748 ret = pool->funcs->acquire_post_bldn_3dlut(res_ctx, pool, mpcc_id, lut, shaper); in dc_acquire_release_mpc_3dlut()
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