Searched refs:jt_offset (Results 1 – 9 of 9) sorted by relevance
203 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()211 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()219 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()227 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()235 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
169 uint32_t jt_offset; /* jt location */ member202 uint32_t jt_offset; /* jt location */ member253 uint32_t jt_offset; /* jt location */ member
116 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in amdgpu_ucode_print_gfx_hdr()151 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()234 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in amdgpu_ucode_print_sdma_hdr()625 le32_to_cpu(cp_hdr->jt_offset) * 4), in amdgpu_ucode_init_single_fw()700 (le32_to_cpu(header->jt_offset) * 4); in amdgpu_ucode_patch_jt()
236 info->image_size = le32_to_cpu(header->jt_offset) << 2; in amdgpu_cgs_get_firmware_info()
5704 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()5712 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()6040 le32_to_cpup(fw_data + pfp_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_pfp_microcode()6117 le32_to_cpup(fw_data + ce_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_ce_microcode()6194 le32_to_cpup(fw_data + me_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_me_microcode()6571 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v10_0_cp_compute_load_microcode()
3424 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()3427 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v9_0_cp_compute_load_microcode()
186 uint32_t jt_offset; /* jt location */ member205 uint32_t jt_offset; /* jt location */ member
99 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in radeon_ucode_print_gfx_hdr()149 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in radeon_ucode_print_sdma_hdr()
6434 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6440 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6446 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6452 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6458 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
