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Searched refs:gb_addr_config (Results 1 – 25 of 35) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c336 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
338 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
340 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
342 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
344 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
346 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
348 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
350 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
352 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
354 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
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Damdgpu_gfx.h137 struct gb_addr_config { struct
172 unsigned gb_addr_config; member
180 struct gb_addr_config gb_addr_config_fields;
Dgfx_v6_0.c1578 u32 gb_addr_config = 0; in gfx_v6_0_constants_init() local
1600 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1617 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1634 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1651 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1668 gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1694 gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK; in gfx_v6_0_constants_init()
1698 gb_addr_config |= 0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
1701 gb_addr_config |= 1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
1704 gb_addr_config |= 2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
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Duvd_v3_1.c270 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
271 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
272 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
Duvd_v4_2.c597 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
598 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
599 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
Duvd_v5_0.c301 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
302 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
303 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
Djpeg_v3_0.c342 adev->gfx.config.gb_addr_config); in jpeg_v3_0_start()
344 adev->gfx.config.gb_addr_config); in jpeg_v3_0_start()
Dgfx_v9_0.c2140 u32 gb_addr_config; in gfx_v9_0_gpu_early_init() local
2152 gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2160 gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2170 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
2171 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
2172 gb_addr_config |= 0x22014042; in gfx_v9_0_gpu_early_init()
2185 gb_addr_config = RAVEN2_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2187 gb_addr_config = RAVEN_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2196 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
2197 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
[all …]
Dgfx_v7_0.c1928 WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
1929 WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
1930 WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
4276 u32 gb_addr_config; in gfx_v7_0_gpu_early_init() local
4297 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4314 gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4331 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4350 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4402 gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK; in gfx_v7_0_gpu_early_init()
4406 gb_addr_config |= (0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT); in gfx_v7_0_gpu_early_init()
[all …]
Djpeg_v2_5.c316 adev->gfx.config.gb_addr_config); in jpeg_v2_5_start()
318 adev->gfx.config.gb_addr_config); in jpeg_v2_5_start()
Dgfx_v8_0.c1695 u32 gb_addr_config; in gfx_v8_0_gpu_early_init() local
1717 gb_addr_config = TOPAZ_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1734 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1749 gb_addr_config = POLARIS11_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1764 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1781 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1798 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1815 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1832 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1887 gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 0); in gfx_v8_0_gpu_early_init()
[all …]
Duvd_v6_0.c634 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
635 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
636 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
Duvd_v7_0.c722 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
724 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
726 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
Djpeg_v2_0.c348 WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in jpeg_v2_0_start()
Dvcn_v2_5.c536 VCN, 0, mmUVD_GFX8_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
997 adev->gfx.config.gb_addr_config); in vcn_v2_5_start()
999 adev->gfx.config.gb_addr_config); in vcn_v2_5_start()
Dgfx_v10_0.c4683 u32 gb_addr_config; in gfx_v10_0_gpu_early_init() local
4696 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v10_0_gpu_early_init()
4709 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v10_0_gpu_early_init()
4711 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in gfx_v10_0_gpu_early_init()
4719 gb_addr_config = CYAN_SKILLFISH_GB_ADDR_CONFIG_GOLDEN; in gfx_v10_0_gpu_early_init()
4726 adev->gfx.config.gb_addr_config = gb_addr_config; in gfx_v10_0_gpu_early_init()
4729 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4736 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4739 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4742 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
[all …]
Dvcn_v2_0.c377 WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in vcn_v2_0_mc_resume()
473 UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
Dsdma_v2_4.c435 adev->gfx.config.gb_addr_config & 0x70); in sdma_v2_4_gfx_resume()
/Linux-v5.15/drivers/gpu/drm/radeon/
Dni.c880 u32 gb_addr_config = 0; in cayman_gpu_init() local
913 gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
987 gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
1018 tmp = (gb_addr_config & NUM_PIPES_MASK) >> NUM_PIPES_SHIFT; in cayman_gpu_init()
1020 tmp = (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT; in cayman_gpu_init()
1022 tmp = (gb_addr_config & NUM_SHADER_ENGINES_MASK) >> NUM_SHADER_ENGINES_SHIFT; in cayman_gpu_init()
1024 tmp = (gb_addr_config & NUM_GPUS_MASK) >> NUM_GPUS_SHIFT; in cayman_gpu_init()
1026 tmp = (gb_addr_config & MULTI_GPU_TILE_SIZE_MASK) >> MULTI_GPU_TILE_SIZE_SHIFT; in cayman_gpu_init()
1028 tmp = (gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT; in cayman_gpu_init()
1074 ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; in cayman_gpu_init()
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Devergreen.c3136 u32 gb_addr_config; in evergreen_gpu_init() local
3177 gb_addr_config = CYPRESS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3199 gb_addr_config = JUNIPER_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3221 gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3244 gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3266 gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3294 gb_addr_config = SUMO_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3316 gb_addr_config = SUMO2_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3338 gb_addr_config = BARTS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3360 gb_addr_config = TURKS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
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Dsi.c3090 u32 gb_addr_config = 0; in si_gpu_init() local
3113 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3130 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3148 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3165 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3182 gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3218 gb_addr_config &= ~ROW_SIZE_MASK; in si_gpu_init()
3222 gb_addr_config |= ROW_SIZE(0); in si_gpu_init()
3225 gb_addr_config |= ROW_SIZE(1); in si_gpu_init()
3228 gb_addr_config |= ROW_SIZE(2); in si_gpu_init()
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Dcik.c3170 u32 gb_addr_config = RREG32(GB_ADDR_CONFIG); in cik_gpu_init() local
3192 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3209 gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3226 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3245 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3279 gb_addr_config &= ~ROW_SIZE_MASK; in cik_gpu_init()
3283 gb_addr_config |= ROW_SIZE(0); in cik_gpu_init()
3286 gb_addr_config |= ROW_SIZE(1); in cik_gpu_init()
3289 gb_addr_config |= ROW_SIZE(2); in cik_gpu_init()
3320 ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; in cik_gpu_init()
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/Linux-v5.15/drivers/gpu/drm/amd/include/
Dkgd_kfd_interface.h164 uint32_t gb_addr_config; member
/Linux-v5.15/include/uapi/linux/
Dkfd_ioctl.h324 __u32 gb_addr_config; /* from KFD */ member
/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/
Dkfd_chardev.c1156 args->gb_addr_config = config.gb_addr_config; in kfd_ioctl_get_tile_config()

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