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Searched refs:drm_dbg_kms (Results 1 – 25 of 78) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/i915/
Dintel_pch.c15 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
19 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
24 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
30 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
37 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); in intel_pch_type()
44 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); in intel_pch_type()
52 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); in intel_pch_type()
60 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); in intel_pch_type()
65 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); in intel_pch_type()
73 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); in intel_pch_type()
[all …]
Dintel_dram.c134 drm_dbg_kms(&i915->drm, in skl_dram_get_dimm_info()
151 drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel); in skl_dram_get_channel_info()
165 drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n", in skl_dram_get_channel_info()
214 drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n", in skl_dram_get_channels_info()
250 drm_dbg_kms(&i915->drm, "DRAM type: %s\n", in skl_get_dram_info()
365 drm_dbg_kms(&i915->drm, in bxt_get_dram_info()
492 drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels); in intel_dram_detect()
494 drm_dbg_kms(&i915->drm, "Watermark level 0 adjustment needed: %s\n", in intel_dram_detect()
/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dsi_vbt.c138 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
160 drm_dbg_kms(&dev_priv->drm, "no dsi device for port %c\n", in mipi_exec_send_packet()
220 drm_dbg_kms(&i915->drm, "\n"); in mipi_exec_delay()
237 drm_dbg_kms(&dev_priv->drm, "unknown gpio index %u\n", in vlv_exec_gpio()
251 drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n"); in vlv_exec_gpio()
254 drm_dbg_kms(&dev_priv->drm, in vlv_exec_gpio()
299 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio()
305 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio()
357 drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n"); in icl_exec_gpio()
367 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_gpio()
[all …]
Dintel_psr.c146 drm_dbg_kms(&i915->drm, "PSR exit events: 0x%x\n", val); in psr_event_print()
148 drm_dbg_kms(&i915->drm, "\tPSR2 watchdog timer expired\n"); in psr_event_print()
150 drm_dbg_kms(&i915->drm, "\tPSR2 disabled\n"); in psr_event_print()
152 drm_dbg_kms(&i915->drm, "\tSU dirty FIFO underrun\n"); in psr_event_print()
154 drm_dbg_kms(&i915->drm, "\tSU CRC FIFO underrun\n"); in psr_event_print()
156 drm_dbg_kms(&i915->drm, "\tGraphics reset\n"); in psr_event_print()
158 drm_dbg_kms(&i915->drm, "\tPCH interrupt\n"); in psr_event_print()
160 drm_dbg_kms(&i915->drm, "\tMemory up\n"); in psr_event_print()
162 drm_dbg_kms(&i915->drm, "\tFront buffer modification\n"); in psr_event_print()
164 drm_dbg_kms(&i915->drm, "\tPSR watchdog timer expired\n"); in psr_event_print()
[all …]
Dintel_dp_link_training.c32 drm_dbg_kms(drm, in intel_dp_dump_link_status()
75 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_phy_caps()
81 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_phy_caps()
106 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_common_caps()
164 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_init_lttpr()
389 drm_dbg_kms(&dev_priv->drm, in intel_dp_program_link_training_pattern()
405 drm_dbg_kms(&dev_priv->drm, "Using vswing level %d%s, pre-emphasis level %d%s, at %s\n", in intel_dp_set_signal_levels()
479 drm_dbg_kms(&i915->drm, in intel_dp_prepare_link_train()
482 drm_dbg_kms(&i915->drm, in intel_dp_prepare_link_train()
563 drm_dbg_kms(&i915->drm, "clock recovery OK\n"); in intel_dp_link_training_clock_recovery()
[all …]
Dintel_fdi.c28 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
32 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
40 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
67 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
75 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
88 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
133 drm_dbg_kms(&i915->drm, in ilk_fdi_compute_config()
239 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
242 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
269 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
[all …]
Dintel_bios.c234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n", in parse_panel_options()
238 drm_dbg_kms(&i915->drm, in parse_panel_options()
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n", in parse_panel_options()
260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); in parse_panel_options()
264 drm_dbg_kms(&i915->drm, in parse_panel_options()
269 drm_dbg_kms(&i915->drm, in parse_panel_options()
307 drm_dbg_kms(&i915->drm, in parse_lfp_panel_dtd()
319 drm_dbg_kms(&i915->drm, in parse_lfp_panel_dtd()
398 drm_dbg_kms(&i915->drm, in parse_generic_dtd()
437 drm_dbg_kms(&i915->drm, in parse_lfp_backlight()
[all …]
Dintel_hdcp.c144 drm_dbg_kms(&i915->drm, "Bksv is invalid\n"); in intel_hdcp_read_valid_bksv()
579 drm_dbg_kms(&dev_priv->drm, "Invalid number of leftovers %d\n", in intel_hdcp_validate_v_prime()
612 drm_dbg_kms(&dev_priv->drm, "SHA-1 mismatch, HDCP failed\n"); in intel_hdcp_validate_v_prime()
631 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
642 drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n"); in intel_hdcp_auth_downstream()
655 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
662 drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n"); in intel_hdcp_auth_downstream()
690 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
695 drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n", in intel_hdcp_auth_downstream()
739 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth()
[all …]
Dintel_fbdev.c197 drm_dbg_kms(&dev_priv->drm, in intelfb_create()
206 drm_dbg_kms(&dev_priv->drm, in intelfb_create()
213 drm_dbg_kms(&dev_priv->drm, "re-using BIOS fb\n"); in intelfb_create()
289 drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n", in intelfb_create()
357 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
364 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
371 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
380 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
394 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
400 drm_dbg_kms(&i915->drm, "checking [PLANE:%d:%s] for BIOS fb\n", in intel_fbdev_init_bios()
[all …]
Dintel_dp.c416 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
430 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
441 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
487 drm_dbg_kms(&i915->drm, "Max link bpp: %u\n", bits_per_pixel); in intel_dp_dsc_get_output_bpp()
496 drm_dbg_kms(&i915->drm, "Max small joiner bpp: %u\n", in intel_dp_dsc_get_output_bpp()
516 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min %u\n", in intel_dp_dsc_get_output_bpp()
557 drm_dbg_kms(&i915->drm, in intel_dp_dsc_get_slice_count()
583 drm_dbg_kms(&i915->drm, "Unsupported Slice Count %d\n", in intel_dp_dsc_get_slice_count()
854 drm_dbg_kms(&i915->drm, "source rates: %s\n", str); in intel_dp_print_rates()
858 drm_dbg_kms(&i915->drm, "sink rates: %s\n", str); in intel_dp_print_rates()
[all …]
Dintel_pps.c63 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_kick()
187 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_pipe()
299 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup()
306 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup()
439 drm_dbg_kms(&dev_priv->drm, "Status 0x%08x Control 0x%08x\n", in intel_pps_check_power_unlocked()
470 drm_dbg_kms(&dev_priv->drm, in wait_panel_status()
483 drm_dbg_kms(&dev_priv->drm, "Wait complete\n"); in wait_panel_status()
490 drm_dbg_kms(&i915->drm, "Wait for panel power on\n"); in wait_panel_on()
498 drm_dbg_kms(&i915->drm, "Wait for panel power off time\n"); in wait_panel_off()
508 drm_dbg_kms(&i915->drm, "Wait for panel power cycle\n"); in wait_panel_power_cycle()
[all …]
Dintel_dp_hdcp.c69 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv()
85 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv()
102 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bksv()
123 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bstatus()
140 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bcaps()
173 drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n", in intel_dp_hdcp_read_ri_prime()
191 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_ready()
215 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_fifo()
238 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_v_prime_part()
265 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_check_link()
[all …]
Dintel_dsi.c38 drm_dbg_kms(&i915->drm, "\n"); in intel_dsi_get_modes()
41 drm_dbg_kms(&i915->drm, "no fixed mode\n"); in intel_dsi_get_modes()
48 drm_dbg_kms(&i915->drm, "drm_mode_duplicate failed\n"); in intel_dsi_get_modes()
64 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_mode_valid()
Dintel_tc.c199 drm_dbg_kms(&i915->drm, in tc_port_fixup_legacy_flag()
218 drm_dbg_kms(&i915->drm, in icl_tc_port_live_status_mask()
282 drm_dbg_kms(&i915->drm, in icl_tc_phy_status_complete()
299 drm_dbg_kms(&i915->drm, in adl_tc_phy_status_complete()
328 drm_dbg_kms(&i915->drm, in icl_tc_phy_take_ownership()
343 drm_dbg_kms(&i915->drm, in icl_tc_phy_take_ownership()
387 drm_dbg_kms(&i915->drm, in icl_tc_phy_is_owned()
435 drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", in icl_tc_phy_connect()
457 drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n", in icl_tc_phy_connect()
463 drm_dbg_kms(&i915->drm, in icl_tc_phy_connect()
[all …]
Dintel_crt.c437 drm_dbg_kms(&dev_priv->drm, in hsw_crt_compute_config()
467 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
480 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
495 drm_dbg_kms(&dev_priv->drm, "ironlake hotplug adpa=0x%x, result %d\n", in ilk_crt_detect_hotplug()
526 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
535 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
547 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
588 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_hotplug()
612 drm_dbg_kms(connector->dev, in intel_crt_get_edid()
661 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc()
[all …]
Dvlv_dsi_pll.c130 drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n"); in vlv_dsi_pll_compute()
142 drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n", in vlv_dsi_pll_compute()
153 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_enable()
178 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in vlv_dsi_pll_enable()
186 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_disable()
242 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_disable()
270 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_get_pclk()
490 drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n"); in bxt_dsi_pll_compute()
516 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_enable()
543 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in bxt_dsi_pll_enable()
Dintel_bw.c174 drm_dbg_kms(&dev_priv->drm, in icl_get_qgv_points()
188 drm_dbg_kms(&dev_priv->drm, in icl_get_qgv_points()
276 drm_dbg_kms(&dev_priv->drm, in icl_get_bw_info()
318 drm_dbg_kms(&dev_priv->drm, in icl_get_bw_info()
328 drm_dbg_kms(&dev_priv->drm, in icl_get_bw_info()
466 drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n", in intel_bw_crtc_update()
727 drm_dbg_kms(&dev_priv->drm, in intel_bw_atomic_check()
765 drm_dbg_kms(&dev_priv->drm, "QGV point %d: max bw %d required %d\n", in intel_bw_atomic_check()
775 drm_dbg_kms(&dev_priv->drm, "PSF GV point %d: max bw %d" in intel_bw_atomic_check()
786 drm_dbg_kms(&dev_priv->drm, "No QGV points provide sufficient memory" in intel_bw_atomic_check()
[all …]
Dintel_dp_aux_backlight.c117 drm_dbg_kms(&i915->drm, "Detected Intel HDR backlight interface version %d\n", in intel_dp_aux_supports_hdr_backlight()
120 drm_dbg_kms(&i915->drm, "Detected unsupported HDR backlight interface version %d\n", in intel_dp_aux_supports_hdr_backlight()
252 drm_dbg_kms(&i915->drm, "SDR backlight is controlled through DPCD\n"); in intel_dp_aux_hdr_setup_backlight()
254 drm_dbg_kms(&i915->drm, "SDR backlight is controlled through PWM\n"); in intel_dp_aux_hdr_setup_backlight()
349 drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n"); in intel_dp_aux_supports_vesa_backlight()
427 drm_dbg_kms(dev, "Using Intel proprietary eDP backlight controls\n"); in intel_dp_aux_init_backlight_funcs()
433 drm_dbg_kms(dev, "Using VESA eDP backlight controls\n"); in intel_dp_aux_init_backlight_funcs()
Dintel_audio.c256 drm_dbg_kms(&dev_priv->drm, in audio_config_hdmi_pixel_clock()
262 drm_dbg_kms(&dev_priv->drm, in audio_config_hdmi_pixel_clock()
330 drm_dbg_kms(&dev_priv->drm, "Disable audio codec\n"); in g4x_audio_codec_disable()
355 drm_dbg_kms(&dev_priv->drm, "Enable audio codec, %u bytes ELD\n", in g4x_audio_codec_enable()
401 drm_dbg_kms(&dev_priv->drm, "using Maud %u, Naud %u\n", nm->m, in hsw_dp_audio_config_update()
404 drm_dbg_kms(&dev_priv->drm, "using automatic Maud, Naud\n"); in hsw_dp_audio_config_update()
455 drm_dbg_kms(&dev_priv->drm, "using N %d\n", n); in hsw_hdmi_audio_config_update()
461 drm_dbg_kms(&dev_priv->drm, "using automatic N\n"); in hsw_hdmi_audio_config_update()
494 drm_dbg_kms(&dev_priv->drm, "Disable audio codec on transcoder %s\n", in hsw_audio_codec_disable()
539 drm_dbg_kms(&i915->drm, "h_active = %u link_clk = %u :" in calc_hblank_early_prog()
[all …]
Dintel_hdmi.c694 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
700 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
842 drm_dbg_kms(&dev_priv->drm, in intel_hdmi_compute_drm_infoframe()
883 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes()
897 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes()
1256 drm_dbg_kms(&dev_priv->drm, "%s DP dual mode adaptor TMDS output\n", in intel_dp_dual_mode_set_tmds_output()
1337 drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n", in intel_hdmi_hdcp_write_an_aksv()
1344 drm_dbg_kms(&i915->drm, "Failed to output aksv (%d)\n", ret); in intel_hdmi_hdcp_write_an_aksv()
1359 drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bksv()
1374 drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bstatus()
[all …]
Dintel_dsb.c51 drm_dbg_kms(&i915->drm, "DSB engine is busy.\n"); in intel_dsb_enable_engine()
69 drm_dbg_kms(&i915->drm, "DSB engine is busy.\n"); in intel_dsb_disable_engine()
108 drm_dbg_kms(&dev_priv->drm, "DSB buffer overflow\n"); in intel_dsb_indexed_reg_write()
186 drm_dbg_kms(&dev_priv->drm, "DSB buffer overflow\n"); in intel_dsb_reg_write()
237 drm_dbg_kms(&dev_priv->drm, in intel_dsb_commit()
Dintel_opregion.c431 drm_dbg_kms(&dev_priv->drm, in asle_set_backlight()
449 drm_dbg_kms(&dev_priv->drm, "updating opregion backlight %d/255\n", in asle_set_backlight()
680 drm_dbg_kms(&dev_priv->drm, "%d outputs detected\n", i); in intel_didl_outputs()
821 drm_dbg_kms(&dev_priv->drm, in intel_load_vbt_firmware()
830 drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n", in intel_load_vbt_firmware()
944 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
950 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
969 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
974 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
1015 drm_dbg_kms(&dev_priv->drm, in intel_opregion_get_panel_type()
[all …]
Dintel_panel.c98 drm_dbg_kms(&dev_priv->drm, in intel_panel_edid_downclock_mode()
125 drm_dbg_kms(&dev_priv->drm, in intel_panel_edid_fixed_mode()
142 drm_dbg_kms(&dev_priv->drm, in intel_panel_edid_fixed_mode()
167 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", in intel_panel_vbt_fixed_mode()
539 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); in intel_panel_set_pwm_level()
718 drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); in intel_panel_actually_set_backlight()
780 drm_dbg_kms(&dev_priv->drm, in lpt_disable_backlight()
896 drm_dbg_kms(&dev_priv->drm, in intel_panel_disable_backlight()
921 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); in lpt_enable_backlight()
973 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); in pch_enable_backlight()
[all …]
/Linux-v5.15/drivers/gpu/drm/
Ddrm_dp_dual_mode_helper.c206 drm_dbg_kms(dev, "DP dual mode HDMI ID: %*pE (err %zd)\n", in drm_dp_dual_mode_detect()
225 drm_dbg_kms(dev, "DP dual mode adaptor ID: %02x (err %zd)\n", adaptor_id, ret); in drm_dp_dual_mode_detect()
288 drm_dbg_kms(dev, "Failed to query max TMDS clock\n"); in drm_dp_dual_mode_max_tmds_clock()
328 drm_dbg_kms(dev, "Failed to query state of TMDS output buffers\n"); in drm_dp_dual_mode_get_tmds_output()
374 drm_dbg_kms(dev, "Failed to %s TMDS output buffers (%d attempts)\n", in drm_dp_dual_mode_set_tmds_output()
382 drm_dbg_kms(dev, in drm_dp_dual_mode_set_tmds_output()
392 drm_dbg_kms(dev, "I2C write value mismatch during TMDS output buffer %s\n", in drm_dp_dual_mode_set_tmds_output()
464 drm_dbg_kms(dev, "LSPCON read(0x80, 0x41) failed\n"); in drm_lspcon_get_mode()
520 drm_dbg_kms(dev, "LSPCON mode changed to %s\n", in drm_lspcon_set_mode()
Ddrm_dp_helper.c150 drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range (max 4)\n", in drm_dp_link_train_clock_recovery_delay()
166 drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range (max 4)\n", in __drm_dp_link_train_channel_eq_delay()
298 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
549 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
615 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
624 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
659 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
708 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
1428 drm_dbg_kms(aux->drm_dev, "%s: transaction failed: %d\n", in drm_dp_i2c_do_msg()
1443 drm_dbg_kms(aux->drm_dev, "%s: native nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
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