Searched refs:dram_info (Results 1 – 6 of 6) sorted by relevance
183 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info() local192 dram_info->num_channels++; in skl_dram_get_channels_info()198 dram_info->num_channels++; in skl_dram_get_channels_info()200 if (dram_info->num_channels == 0) { in skl_dram_get_channels_info()210 dram_info->wm_lv_0_adjust_needed = ch0.is_16gb_dimm || ch1.is_16gb_dimm; in skl_dram_get_channels_info()212 dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1); in skl_dram_get_channels_info()215 yesno(dram_info->symmetric_memory)); in skl_dram_get_channels_info()246 struct dram_info *dram_info = &i915->dram_info; in skl_get_dram_info() local249 dram_info->type = skl_get_dram_type(i915); in skl_get_dram_info()251 intel_dram_type_str(dram_info->type)); in skl_get_dram_info()[all …]
1138 struct dram_info { struct1153 } dram_info; member
2950 if (dev_priv->dram_info.wm_lv_0_adjust_needed) in intel_read_wm_latency()7212 return dev_priv->dram_info.symmetric_memory; in intel_can_enable_ipc()
138 const struct dram_info *dram_info = &dev_priv->dram_info; in icl_get_qgv_points() local141 qi->num_points = dram_info->num_qgv_points; in icl_get_qgv_points()142 qi->num_psf_points = dram_info->num_psf_gv_points; in icl_get_qgv_points()145 switch (dram_info->type) { in icl_get_qgv_points()157 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8; in icl_get_qgv_points()267 int num_channels = max_t(u8, 1, dev_priv->dram_info.num_channels); in icl_get_bw_info()
5730 enum intel_dram_type type = dev_priv->dram_info.type; in tgl_bw_buddy_init()5731 u8 num_channels = dev_priv->dram_info.num_channels; in tgl_bw_buddy_init()
267 struct iwl_dram_sec_info dram_info; member289 struct iwl_dram_sec_info dram_info; member
