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Searched refs:ddr50 (Results 1 – 25 of 25) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Dsdhci-omap.txt15 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
Dsdhci-st.txt57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
Dbrcm,sdhci-brcmstb.txt22 sd-uhs-ddr50;
/Linux-v5.15/arch/arm/boot/dts/
Dstih410-b2120.dts33 sd-uhs-ddr50;
Dstih418-b2199.dts83 sd-uhs-ddr50;
Ddra72-evm.dts94 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Ddra72-evm-revc.dts124 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Ddra7-evm.dts389 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
Ddra71-evm.dts203 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Dstm32mp157c-ed1.dts352 sd-uhs-ddr50;
Drk3288-firefly-reload.dts265 sd-uhs-ddr50;
Dimx6qdl-skov-cpu.dtsi319 sd-uhs-ddr50;
Dexynos5420-arndale-octa.dts807 sd-uhs-ddr50;
Dexynos5422-odroid-core.dtsi982 sd-uhs-ddr50;
Dqcom-ipq8064.dtsi1218 sd-uhs-ddr50;
/Linux-v5.15/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905x-libretech-cc-v2.dts251 sd-uhs-ddr50;
Dmeson-gx-libretech-pc.dtsi382 sd-uhs-ddr50;
Dmeson-gxbb-odroidc2.dts366 sd-uhs-ddr50;
Dmeson-gxbb-nanopi-k2.dts349 sd-uhs-ddr50;
/Linux-v5.15/include/linux/
Drtsx_pci.h1294 #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ argument
1295 (((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi1070 ti,otap-del-sel-ddr50 = <0xc>;
1075 ti,itap-del-sel-ddr50 = <0x2>;
1096 ti,otap-del-sel-ddr50 = <0xc>;
1101 ti,itap-del-sel-ddr50 = <0x2>;
Dk3-am65-main.dtsi269 ti,otap-del-sel-ddr50 = <0x5>;
291 ti,otap-del-sel-ddr50 = <0x4>;
Dk3-j7200-main.dtsi525 ti,otap-del-sel-ddr50 = <0xc>;
Dk3-am64-main.dtsi479 ti,otap-del-sel-ddr50 = <0x9>;
/Linux-v5.15/arch/powerpc/boot/dts/
Dfsp2.dts506 sd-uhs-ddr50;