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Searched refs:clk_table (Results 1 – 25 of 27) sorted by relevance

12

/Linux-v5.15/drivers/clk/samsung/
Dclk-s5pv210-audss.c70 struct clk_hw **clk_table; in s5pv210_audss_clk_probe() local
86 clk_table = clk_data->hws; in s5pv210_audss_clk_probe()
115 clk_table[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", in s5pv210_audss_clk_probe()
126 clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", in s5pv210_audss_clk_probe()
131 clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
134 clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
138 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", in s5pv210_audss_clk_probe()
144 clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", in s5pv210_audss_clk_probe()
147 clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", in s5pv210_audss_clk_probe()
150 clk_table[CLK_HCLK_HWA] = clk_hw_register_gate(NULL, "hclk_hwa_audss", in s5pv210_audss_clk_probe()
[all …]
Dclk-s3c2410-dclk.c245 struct clk_hw **clk_table; in s3c24xx_dclk_probe() local
255 clk_table = s3c24xx_dclk->clk_data.hws; in s3c24xx_dclk_probe()
270 clk_table[MUX_DCLK0] = clk_hw_register_mux(&pdev->dev, "mux_dclk0", in s3c24xx_dclk_probe()
275 clk_table[MUX_DCLK1] = clk_hw_register_mux(&pdev->dev, "mux_dclk1", in s3c24xx_dclk_probe()
281 clk_table[DIV_DCLK0] = clk_hw_register_divider(&pdev->dev, "div_dclk0", in s3c24xx_dclk_probe()
284 clk_table[DIV_DCLK1] = clk_hw_register_divider(&pdev->dev, "div_dclk1", in s3c24xx_dclk_probe()
288 clk_table[GATE_DCLK0] = clk_hw_register_gate(&pdev->dev, "gate_dclk0", in s3c24xx_dclk_probe()
292 clk_table[GATE_DCLK1] = clk_hw_register_gate(&pdev->dev, "gate_dclk1", in s3c24xx_dclk_probe()
297 clk_table[MUX_CLKOUT0] = s3c24xx_register_clkout(&pdev->dev, in s3c24xx_dclk_probe()
300 clk_table[MUX_CLKOUT1] = s3c24xx_register_clkout(&pdev->dev, in s3c24xx_dclk_probe()
[all …]
Dclk-exynos-audss.c131 struct clk_hw **clk_table; in exynos_audss_clk_probe() local
155 clk_table = clk_data->hws; in exynos_audss_clk_probe()
186 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()
197 clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(dev, "mout_i2s", in exynos_audss_clk_probe()
202 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", in exynos_audss_clk_probe()
206 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(dev, in exynos_audss_clk_probe()
210 clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(dev, "dout_i2s", in exynos_audss_clk_probe()
214 clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(dev, "srp_clk", in exynos_audss_clk_probe()
218 clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(dev, "i2s_bus", in exynos_audss_clk_probe()
222 clk_table[EXYNOS_SCLK_I2S] = clk_hw_register_gate(dev, "sclk_i2s", in exynos_audss_clk_probe()
[all …]
/Linux-v5.15/drivers/clk/mmp/
Dclk.c13 struct clk **clk_table; in mmp_clk_init() local
15 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in mmp_clk_init()
16 if (!clk_table) in mmp_clk_init()
19 unit->clk_table = clk_table; in mmp_clk_init()
21 unit->clk_data.clks = clk_table; in mmp_clk_init()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
66 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_factor_clks()
92 unit->clk_table[clks[i].id] = clk; in mmp_register_general_gate_clks()
120 unit->clk_table[clks[i].id] = clk; in mmp_register_gate_clks()
148 unit->clk_table[clks[i].id] = clk; in mmp_register_mux_clks()
[all …]
Dclk-pll.c168 unit->clk_table[clks[i].id] = clk; in mmp_register_pll_clks()
/Linux-v5.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_processpptables.c572 phm_ppt_v1_clock_voltage_dependency_table *clk_table; in get_socclk_voltage_dependency_table() local
577 clk_table = kzalloc(struct_size(clk_table, entries, clk_dep_table->ucNumEntries), in get_socclk_voltage_dependency_table()
579 if (!clk_table) in get_socclk_voltage_dependency_table()
582 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
585 clk_table->entries[i].vddInd = in get_socclk_voltage_dependency_table()
587 clk_table->entries[i].clk = in get_socclk_voltage_dependency_table()
591 *pp_vega10_clk_dep_table = clk_table; in get_socclk_voltage_dependency_table()
638 *clk_table; in get_gfxclk_voltage_dependency_table() local
644 clk_table = kzalloc(struct_size(clk_table, entries, clk_dep_table->ucNumEntries), in get_gfxclk_voltage_dependency_table()
646 if (!clk_table) in get_gfxclk_voltage_dependency_table()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dyellow_carp_ppt.c795 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in yellow_carp_get_dpm_level_count() local
799 *count = clk_table->NumSocClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
802 *count = clk_table->VcnClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
805 *count = clk_table->VcnClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
808 *count = clk_table->NumDfPstatesEnabled; in yellow_carp_get_dpm_level_count()
811 *count = clk_table->NumDfPstatesEnabled; in yellow_carp_get_dpm_level_count()
825 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in yellow_carp_get_dpm_freq_by_index() local
827 if (!clk_table || clk_type >= SMU_CLK_COUNT) in yellow_carp_get_dpm_freq_by_index()
832 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
834 *freq = clk_table->SocClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c103 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); in dcn3_init_single_clock()
113 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; in dcn3_build_wm_range_table()
185 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, in dcn3_init_clocks()
190 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
195 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
201 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, in dcn3_init_clocks()
206 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, in dcn3_init_clocks()
211 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
308 …clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].mem… in dcn3_update_clocks()
405 …clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].mem… in dcn3_set_hard_min_memclk()
[all …]
/Linux-v5.15/drivers/clk/hisilicon/
Dclk.c31 struct clk **clk_table; in hisi_clk_alloc() local
45 clk_table = devm_kmalloc_array(&pdev->dev, nr_clks, in hisi_clk_alloc()
46 sizeof(*clk_table), in hisi_clk_alloc()
48 if (!clk_table) in hisi_clk_alloc()
51 clk_data->clk_data.clks = clk_table; in hisi_clk_alloc()
62 struct clk **clk_table; in hisi_clk_init() local
76 clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL); in hisi_clk_init()
77 if (!clk_table) in hisi_clk_init()
80 clk_data->clk_data.clks = clk_table; in hisi_clk_init()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c320 .clk_table = {
427 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; in dcn31_build_watermark_ranges()
430 bw_params->clk_table.entries[i].dcfclk_mhz; in dcn31_build_watermark_ranges()
566 bw_params->clk_table.num_entries = j + 1; in dcn31_clk_mgr_helper_populate_bw_params()
577 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { in dcn31_clk_mgr_helper_populate_bw_params()
578 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; in dcn31_clk_mgr_helper_populate_bw_params()
579 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn31_clk_mgr_helper_populate_bw_params()
580 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn31_clk_mgr_helper_populate_bw_params()
583 bw_params->clk_table.entries[i].wck_ratio = 2; in dcn31_clk_mgr_helper_populate_bw_params()
586 bw_params->clk_table.entries[i].wck_ratio = 4; in dcn31_clk_mgr_helper_populate_bw_params()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c536 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in vangogh_get_dpm_clk_limited() local
538 if (!clk_table || clk_type >= SMU_CLK_COUNT) in vangogh_get_dpm_clk_limited()
543 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
545 *freq = clk_table->SocClocks[dpm_level]; in vangogh_get_dpm_clk_limited()
548 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
550 *freq = clk_table->VcnClocks[dpm_level].vclk; in vangogh_get_dpm_clk_limited()
553 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
555 *freq = clk_table->VcnClocks[dpm_level].dclk; in vangogh_get_dpm_clk_limited()
559 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
561 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
[all …]
/Linux-v5.15/drivers/clk/axis/
Dclk-artpec6.c20 struct clk *clk_table[ARTPEC6_CLK_NUMCLOCKS]; member
56 clks = clkdata->clk_table; in of_artpec6_clkctrl_setup()
107 clkdata->clk_data.clks = clkdata->clk_table; in of_artpec6_clkctrl_setup()
121 struct clk **clks = clkdata->clk_table; in artpec6_clkctrl_probe()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c482 …ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = bw_params->clk_table.entries[i - 1].dcf… in build_watermark_ranges()
484 …ranges->reader_wm_sets[num_valid_sets].max_drain_clk_mhz = bw_params->clk_table.entries[i].dcfclk_… in build_watermark_ranges()
581 .clk_table = {
889 bw_params->clk_table.num_entries = j + 1; in rn_clk_mgr_helper_populate_bw_params()
891 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { in rn_clk_mgr_helper_populate_bw_params()
892 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
893 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
894 bw_params->clk_table.entries[i].voltage = clock_table->FClocks[j].Vol; in rn_clk_mgr_helper_populate_bw_params()
895 …bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->FCl… in rn_clk_mgr_helper_populate_bw_params()
896 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table, in rn_clk_mgr_helper_populate_bw_params()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c1302 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn302_update_bw_bounding_box()
1306 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn302_update_bw_bounding_box()
1307 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn302_update_bw_bounding_box()
1308 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) in dcn302_update_bw_bounding_box()
1309 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn302_update_bw_bounding_box()
1310 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn302_update_bw_bounding_box()
1311 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn302_update_bw_bounding_box()
1312 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn302_update_bw_bounding_box()
1313 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn302_update_bw_bounding_box()
1340 num_uclk_states = bw_params->clk_table.num_entries; in dcn302_update_bw_bounding_box()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c1236 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn303_update_bw_bounding_box()
1240 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn303_update_bw_bounding_box()
1241 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn303_update_bw_bounding_box()
1242 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) in dcn303_update_bw_bounding_box()
1243 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn303_update_bw_bounding_box()
1244 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn303_update_bw_bounding_box()
1245 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn303_update_bw_bounding_box()
1246 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn303_update_bw_bounding_box()
1247 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn303_update_bw_bounding_box()
1272 num_uclk_states = bw_params->clk_table.num_entries; in dcn303_update_bw_bounding_box()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c1152 vlevel_max = bw_params->clk_table.num_entries - 1; in dcn21_calculate_wm()
1563 …dpi_voltage_scaling_st construct_low_pstate_lvl(struct clk_limit_table *clk_table, unsigned int hi… in construct_low_pstate_lvl() argument
1569 low_pstate_lvl.dcfclk_mhz = clk_table->entries[0].dcfclk_mhz; in construct_low_pstate_lvl()
1570 low_pstate_lvl.fabricclk_mhz = clk_table->entries[0].fclk_mhz; in construct_low_pstate_lvl()
1571 low_pstate_lvl.socclk_mhz = clk_table->entries[0].socclk_mhz; in construct_low_pstate_lvl()
1572 low_pstate_lvl.dram_speed_mts = clk_table->entries[0].memclk_mhz * 2; in construct_low_pstate_lvl()
1582 for (i = clk_table->num_entries; i > 1; i--) in construct_low_pstate_lvl()
1583 clk_table->entries[i] = clk_table->entries[i-1]; in construct_low_pstate_lvl()
1584 clk_table->entries[1] = clk_table->entries[0]; in construct_low_pstate_lvl()
1585 clk_table->num_entries++; in construct_low_pstate_lvl()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c421 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; in vg_build_watermark_ranges()
424 bw_params->clk_table.entries[i].dcfclk_mhz; in vg_build_watermark_ranges()
505 .clk_table = {
658 bw_params->clk_table.num_entries = j + 1; in vg_clk_mgr_helper_populate_bw_params()
660 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { in vg_clk_mgr_helper_populate_bw_params()
661 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params()
662 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
663 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; in vg_clk_mgr_helper_populate_bw_params()
664 …bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfP… in vg_clk_mgr_helper_populate_bw_params()
673 if (i >= bw_params->clk_table.num_entries) { in vg_clk_mgr_helper_populate_bw_params()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c1794 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn31_update_bw_bounding_box() local
1807 ASSERT(clk_table->num_entries); in dcn31_update_bw_bounding_box()
1810 for (i = 0; i < clk_table->num_entries; ++i) { in dcn31_update_bw_bounding_box()
1811 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) in dcn31_update_bw_bounding_box()
1812 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; in dcn31_update_bw_bounding_box()
1813 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) in dcn31_update_bw_bounding_box()
1814 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; in dcn31_update_bw_bounding_box()
1817 for (i = 0; i < clk_table->num_entries; i++) { in dcn31_update_bw_bounding_box()
1820 if ((unsigned int) dcn3_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { in dcn31_update_bw_bounding_box()
1829 clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; in dcn31_update_bw_bounding_box()
[all …]
/Linux-v5.15/drivers/acpi/pmic/
Dtps68470_pmic.c168 static const struct tps68470_pmic_table clk_table[] = { variable
330 clk_table, in tps68470_pmic_clk_handler()
331 ARRAY_SIZE(clk_table)); in tps68470_pmic_clk_handler()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c1574 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn301_update_bw_bounding_box() local
1585 ASSERT(clk_table->num_entries); in dcn301_update_bw_bounding_box()
1586 for (i = 0; i < clk_table->num_entries; i++) { in dcn301_update_bw_bounding_box()
1589 if ((unsigned int) dcn3_01_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { in dcn301_update_bw_bounding_box()
1596 clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; in dcn301_update_bw_bounding_box()
1597 clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; in dcn301_update_bw_bounding_box()
1598 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn301_update_bw_bounding_box()
1599 clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in dcn301_update_bw_bounding_box()
1609 for (i = 0; i < clk_table->num_entries; i++) in dcn301_update_bw_bounding_box()
1611 if (clk_table->num_entries) { in dcn301_update_bw_bounding_box()
[all …]
/Linux-v5.15/drivers/clk/rockchip/
Dclk.c357 struct clk **clk_table; in rockchip_clk_init() local
364 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in rockchip_clk_init()
365 if (!clk_table) in rockchip_clk_init()
369 clk_table[i] = ERR_PTR(-ENOENT); in rockchip_clk_init()
372 ctx->clk_data.clks = clk_table; in rockchip_clk_init()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c2196 …min_dram_speed_mts = dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.n… in dcn30_calculate_wm_and_dlg_fp()
2400 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn30_update_bw_bounding_box()
2404 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn30_update_bw_bounding_box()
2405 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn30_update_bw_bounding_box()
2406 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) in dcn30_update_bw_bounding_box()
2407 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn30_update_bw_bounding_box()
2408 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn30_update_bw_bounding_box()
2409 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn30_update_bw_bounding_box()
2410 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn30_update_bw_bounding_box()
2411 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn30_update_bw_bounding_box()
[all …]
/Linux-v5.15/sound/soc/samsung/
Di2s.c117 struct clk *clk_table[3]; member
808 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; in i2s_hw_params()
1250 if (!IS_ERR(priv->clk_table[i])) in i2s_unregister_clocks()
1251 clk_unregister(priv->clk_table[i]); in i2s_unregister_clocks()
1299 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, in i2s_register_clock_provider()
1306 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, in i2s_register_clock_provider()
1316 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, in i2s_register_clock_provider()
1323 priv->clk_data.clks = priv->clk_table; in i2s_register_clock_provider()
1527 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); in samsung_i2s_probe()
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c196 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in renoir_get_dpm_clk_limited() local
198 if (!clk_table || clk_type >= SMU_CLK_COUNT) in renoir_get_dpm_clk_limited()
205 *freq = clk_table->SocClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
211 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
216 *freq = clk_table->DcfClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
221 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
226 *freq = clk_table->VClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
231 *freq = clk_table->DClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h214 struct clk_limit_table clk_table; member

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