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Searched refs:REG_WAIT (Results 1 – 25 of 34) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_hwseq.c60 REG_WAIT(DOMAIN1_PG_STATUS, in dcn302_dpp_pg_control()
68 REG_WAIT(DOMAIN3_PG_STATUS, in dcn302_dpp_pg_control()
76 REG_WAIT(DOMAIN5_PG_STATUS, in dcn302_dpp_pg_control()
84 REG_WAIT(DOMAIN7_PG_STATUS, in dcn302_dpp_pg_control()
92 REG_WAIT(DOMAIN9_PG_STATUS, in dcn302_dpp_pg_control()
117 REG_WAIT(DOMAIN0_PG_STATUS, in dcn302_hubp_pg_control()
125 REG_WAIT(DOMAIN2_PG_STATUS, in dcn302_hubp_pg_control()
133 REG_WAIT(DOMAIN4_PG_STATUS, in dcn302_hubp_pg_control()
141 REG_WAIT(DOMAIN6_PG_STATUS, in dcn302_hubp_pg_control()
149 REG_WAIT(DOMAIN8_PG_STATUS, in dcn302_hubp_pg_control()
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.c96 REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dce_dmcu_load_iram()
120 REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dce_get_dmcu_psr_state()
144 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_dmcu_set_psr_enable()
238 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_dmcu_setup_psr()
315 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); in dce_psr_wait_loop()
347 REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dcn10_get_dmcu_version()
369 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_enable_fractional_pwm()
382 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_enable_fractional_pwm()
419 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_init()
437 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); in dcn10_dmcu_init()
[all …]
Ddce_abm.c66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
106 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, in dmcu_set_backlight_level()
134 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, in dmcu_set_backlight_level()
206 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_level()
Ddce_aux.c148 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1, in acquire_engine()
159 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0, in acquire_engine()
223 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0, in submit_channel_request()
352 REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1, in get_channel_status()
Ddce_panel_cntl.c249 REG_WAIT(BL_PWM_GRP1_REG_LOCK, in dce_driver_set_backlight()
Ddce_stream_encoder.c90 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in dce110_update_generic_info_packet()
736 REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, in dce110_stream_encoder_set_throttled_vcp_size()
955 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in dce110_stream_encoder_dp_blank()
Ddce_mem_input.c745 REG_WAIT(DMIF_BUFFER_CONTROL, in dce_mi_allocate_dmif()
782 REG_WAIT(DMIF_BUFFER_CONTROL, in dce_mi_free_dmif()
Ddce_opp.c649 REG_WAIT(FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, 1, 10, 10); in program_formatter_reset_dig_resync_fifo()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hwseq.c330 REG_WAIT(DOMAIN16_PG_STATUS, in dcn31_dsc_pg_control()
338 REG_WAIT(DOMAIN17_PG_STATUS, in dcn31_dsc_pg_control()
346 REG_WAIT(DOMAIN18_PG_STATUS, in dcn31_dsc_pg_control()
456 REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn31_hubp_pg_control()
460 REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn31_hubp_pg_control()
464 REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn31_hubp_pg_control()
468 REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn31_hubp_pg_control()
Ddcn31_optc.c138 REG_WAIT(OTG_CLOCK_CONTROL, in optc31_disable_crtc()
157 REG_WAIT(OTG_CLOCK_CONTROL, in optc31_immediate_disable_crtc()
Ddcn31_dccg.c159 REG_WAIT(OTG_PIXEL_RATE_CNTL[dtbclk_inst], in dccg31_set_dtbclk_dto()
Ddcn31_hubbub.c118 REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100); in dcn31_program_compbuf_size()
119 REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100); in dcn31_program_compbuf_size()
120 REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100); in dcn31_program_compbuf_size()
121 REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100); in dcn31_program_compbuf_size()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_optc.c317 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
364 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc2_align_vblanks()
391 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
433 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc2_triplebuffer_lock()
Ddcn20_hwseq.c363 REG_WAIT(DOMAIN16_PG_STATUS, in dcn20_dsc_pg_control()
371 REG_WAIT(DOMAIN17_PG_STATUS, in dcn20_dsc_pg_control()
379 REG_WAIT(DOMAIN18_PG_STATUS, in dcn20_dsc_pg_control()
387 REG_WAIT(DOMAIN19_PG_STATUS, in dcn20_dsc_pg_control()
395 REG_WAIT(DOMAIN20_PG_STATUS, in dcn20_dsc_pg_control()
403 REG_WAIT(DOMAIN21_PG_STATUS, in dcn20_dsc_pg_control()
434 REG_WAIT(DOMAIN1_PG_STATUS, in dcn20_dpp_pg_control()
442 REG_WAIT(DOMAIN3_PG_STATUS, in dcn20_dpp_pg_control()
450 REG_WAIT(DOMAIN5_PG_STATUS, in dcn20_dpp_pg_control()
458 REG_WAIT(DOMAIN7_PG_STATUS, in dcn20_dpp_pg_control()
[all …]
Ddcn20_stream_encoder.c236 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc2_update_gsp7_128_info_packet()
493 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc2_stream_encoder_dp_unblank()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c80 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc1_update_generic_info_packet()
654 REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, in enc1_stream_encoder_set_throttled_vcp_size()
778 REG_WAIT(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING, in enc1_stream_encoder_send_immediate_sdp_message()
791 REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, in enc1_stream_encoder_send_immediate_sdp_message()
834 REG_WAIT(AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE_PENDING, in enc1_stream_encoder_send_immediate_sdp_message()
922 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in enc1_stream_encoder_dp_blank()
Ddcn10_optc.c471 REG_WAIT(OPTC_INPUT_CLOCK_CONTROL, in optc1_enable_optc_clock()
479 REG_WAIT(OTG_CLOCK_CONTROL, in optc1_enable_optc_clock()
544 REG_WAIT(OTG_CLOCK_CONTROL, in optc1_disable_crtc()
664 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc1_lock()
829 REG_WAIT(OTG_STATUS, in optc1_wait_for_state()
835 REG_WAIT(OTG_STATUS, in optc1_wait_for_state()
Ddcn10_hw_sequencer.c571 REG_WAIT(DOMAIN1_PG_STATUS, in dcn10_dpp_pg_control()
579 REG_WAIT(DOMAIN3_PG_STATUS, in dcn10_dpp_pg_control()
587 REG_WAIT(DOMAIN5_PG_STATUS, in dcn10_dpp_pg_control()
595 REG_WAIT(DOMAIN7_PG_STATUS, in dcn10_dpp_pg_control()
632 REG_WAIT(DOMAIN0_PG_STATUS, in dcn10_hubp_pg_control()
640 REG_WAIT(DOMAIN2_PG_STATUS, in dcn10_hubp_pg_control()
648 REG_WAIT(DOMAIN4_PG_STATUS, in dcn10_hubp_pg_control()
656 REG_WAIT(DOMAIN6_PG_STATUS, in dcn10_hubp_pg_control()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_optc.c55 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc3_triplebuffer_lock()
112 REG_WAIT(OTG_MASTER_UPDATE_LOCK, in optc3_lock()
Ddcn30_vpg.c71 REG_WAIT(VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, in vpg3_update_generic_info_packet()
Ddcn30_mpc.c157 REG_WAIT(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_STATE, 0, 10, 10); in mpc3_power_on_ogam_lut()
824 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_SHAPER_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
825 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_3DLUT_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
835 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_SHAPER_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
836 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_3DLUT_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
Ddcn30_mmhubbub.c94 REG_WAIT(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_STATUS, 1, 20, 100); in mmhubbub3_warmup_mcif()
Ddcn30_dpp.c500 REG_WAIT(CM_MEM_PWR_STATUS, BLNDGAM_MEM_PWR_STATE, 0, 1, 5); in dpp3_power_on_blnd_lut()
516 REG_WAIT(CM_MEM_PWR_STATUS2, HDR3DLUT_MEM_PWR_STATE, 0, 1, 5); in dpp3_power_on_hdr3dlut()
529 REG_WAIT(CM_MEM_PWR_STATUS2, SHAPER_MEM_PWR_STATE, 0, 1, 5); in dpp3_power_on_shaper()
Ddcn30_dpp_cm.c141 REG_WAIT(CM_MEM_PWR_STATUS, GAMCOR_MEM_PWR_STATE, 0, 1, 5); in dpp3_power_on_gamcor_lut()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c173 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 100); in dcn20_update_clocks_update_dentist()
200 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 1000); in dcn20_update_clocks_update_dentist()
203 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100); in dcn20_update_clocks_update_dentist()

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