Searched refs:PCS (Results 1 – 19 of 19) sorted by relevance
| /Linux-v5.15/drivers/net/pcs/ |
| D | Kconfig | 3 # PCS Layer Configuration
6 menu "PCS device drivers"
18 This module provides helpers to phylink for managing the Lynx PCS
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| /Linux-v5.15/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ |
| D | mac-phy-support.rst | 54 | MC firmware polling MAC PCS for link |
56 | | PCS | | PCS | | PCS | | PCS | |
65 the MC firmware by polling the MAC PCS. Without the need to register a
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 7 - PCS registers
15 The last interrupt listed should be the PCS auto-negotiation interrupt.
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| D | fsl-fman.txt | 408 Definition: Fman has internal MDIO for internal PCS(Physical
418 set when reading internal PCS registers. MDIO reads to
419 internal PCS registers may result in having the
423 PCS registers through MDIO. As a workaround, all internal
430 - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
431 PCS PHY addr must be '0'.
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| D | xilinx_axienet.txt | 51 PCS/PMA PHY)
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | ls1021a-tsn.dts | 234 /* SGMII PCS for enet0 */
242 /* SGMII PCS for enet1 */
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| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | ti-phy.txt | 13 set PCS delay value.
59 register offset to write the PCS delay value.
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| /Linux-v5.15/arch/arm64/boot/dts/qcom/ |
| D | ipq8074.dtsi | 112 <0x00058800 0x1f8>, /* PCS */
113 <0x00058600 0x044>; /* PCS misc*/
155 <0x00078800 0x1f8>, /* PCS */
156 <0x00078600 0x044>; /* PCS misc*/
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| D | ipq6018.dtsi | 407 <0x0 0x84800 0x0 0x4f4>; /* PCS: Lane0, COM, PCIE */
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| /Linux-v5.15/drivers/spi/ |
| D | spi-atmel.c | 343 SPI_BF(PCS, ~(0x01 << chip_select)) in cs_activate()
349 SPI_BF(PCS, ~(0x01 << chip_select)) in cs_activate()
369 mr = SPI_BFINS(PCS, ~(1 << chip_select), mr); in cs_activate()
390 if (~SPI_BFEXT(PCS, mr) & (1 << chip_select)) { in cs_deactivate()
391 mr = SPI_BFINS(PCS, 0xf, mr); in cs_deactivate()
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| /Linux-v5.15/Documentation/devicetree/bindings/net/dsa/ |
| D | ocelot.txt | 43 because the Felix PHYLINK implementation accesses the MAC PCS registers, which
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| /Linux-v5.15/drivers/net/ethernet/mellanox/mlx4/ |
| D | en_port.h | 331 __be64 PCS; member
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| D | en_port.c | 306 stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) + in mlx4_en_DUMP_ETH_STATS()
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| /Linux-v5.15/Documentation/networking/ |
| D | sfp-phylink.rst | 217 should be used to configure the MAC when the MAC and PCS are not
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| D | phy.rst | 296 This is the IEEE 802.3 PCS Clause 107 defined 25GBASE-R protocol.
297 The PCS is identical to 10GBASE-R, i.e. 64B/66B encoded
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| D | ethtool-netlink.rst | 1352 are counters corresponding to lanes/PCS instances. The number of entries in
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| /Linux-v5.15/sound/pci/ |
| D | Kconfig | 590 FM801 chip with a TEA5757 tuner (MediaForte SF256-PCS, SF256-PCP and
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| /Linux-v5.15/Documentation/sound/ |
| D | alsa-configuration.rst | 886 1 = MediaForte 256-PCS,
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| /Linux-v5.15/ |
| D | MAINTAINERS | 11048 LYNX PCS MODULE
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