Searched refs:IS_ROCKETLAKE (Results 1 – 21 of 21) sorted by relevance
100 !IS_ROCKETLAKE(dev_priv)); in intel_pch_type()122 !IS_ROCKETLAKE(dev_priv) && in intel_pch_type()166 else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_virt_detect_pch()
149 } else if (IS_ROCKETLAKE(i915)) { in intel_step_init()
1441 #define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE) macro1536 (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))1733 #define HAS_D12_PLANE_MINIMIZATION(dev_priv) (IS_ROCKETLAKE(dev_priv) || \
7486 if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv) || in gen12lp_init_clock_gating()
139 IS_ROCKETLAKE(i915) || in has_phy_misc()207 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
1669 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { in map_ddc_pin()1778 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()2897 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()2907 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()
704 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_dmc_ucode_init()
418 else if (IS_ROCKETLAKE(dev_priv)) in intel_bw_init_hw()
3199 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_get_combo_phy_dpll()3503 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_pll_get_hw_state()3562 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_dpll_write()4105 else if (IS_ROCKETLAKE(dev_priv)) in intel_shared_dpll_init()
567 if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) in intel_dsc_power_domain()
1312 if ((IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) && in i915_audio_component_init()
1598 } else if (IS_ROCKETLAKE(i915)) { in intel_ddi_buf_trans_init()
874 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
1912 if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv) || in gen12_plane_supports_mc_ccs()
4571 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_ddi_init()4626 else if (IS_ROCKETLAKE(dev_priv)) in intel_ddi_init()
2870 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_init_cdclk_hooks()
2774 else if (IS_ROCKETLAKE(dev_priv)) in intel_hdmi_ddc_pin()
3765 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()3812 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()11500 } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { in intel_setup_outputs()
5138 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_power_domains_init()
1634 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()1659 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()1673 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()1690 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || in rcs_engine_wa_init()
32 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()