Searched refs:IS_ALDERLAKE_S (Results 1 – 19 of 19) sorted by relevance
133 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) && in intel_pch_type()164 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) in intel_virt_detect_pch()
143 } else if (IS_ALDERLAKE_S(i915)) { in intel_step_init()
1443 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S) macro1544 (IS_ALDERLAKE_S(__i915) && \1548 (IS_ALDERLAKE_S(__i915) && \1734 IS_ALDERLAKE_S(dev_priv))
7487 IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) in gen12lp_init_clock_gating()
136 if (IS_ALDERLAKE_S(i915)) in has_phy_misc()205 else if (IS_ALDERLAKE_S(dev_priv)) in phy_is_master()
1664 if (IS_ALDERLAKE_S(i915)) { in map_ddc_pin()1773 else if (IS_ALDERLAKE_S(i915)) in dvo_port_to_port()2889 if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()2895 if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()2905 else if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()2915 else if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()
696 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_dmc_ucode_init()
416 else if (IS_ALDERLAKE_S(dev_priv)) in intel_bw_init_hw()
3183 if (IS_ALDERLAKE_S(dev_priv)) { in icl_get_combo_phy_dpll()3497 if (IS_ALDERLAKE_S(dev_priv)) { in icl_pll_get_hw_state()3556 if (IS_ALDERLAKE_S(dev_priv)) { in icl_dpll_write()4101 else if (IS_ALDERLAKE_S(dev_priv)) in intel_shared_dpll_init()
371 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()392 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
1596 } else if (IS_ALDERLAKE_S(i915)) { in intel_ddi_buf_trans_init()
874 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
1252 if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) && in skl_plane_check_fb()
5135 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_power_domains_init()5740 if (IS_ALDERLAKE_S(dev_priv) || in tgl_bw_buddy_init()
2770 if (IS_ALDERLAKE_S(dev_priv)) in intel_hdmi_ddc_pin()
3763 else if (IS_ALDERLAKE_S(dev_priv)) in intel_phy_is_combo()3810 else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) in intel_port_to_phy()11494 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_setup_outputs()
4566 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_ddi_init()
1633 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()1657 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()1691 IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
38 if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) { in uc_expand_default_options()