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Searched refs:GCC_USB3PHY_PHY_SEC_BCR (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.15/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h153 #define GCC_USB3PHY_PHY_SEC_BCR 9 macro
Dqcom,gcc-sdm845.h225 #define GCC_USB3PHY_PHY_SEC_BCR 21 macro
Dqcom,gcc-sm8150.h233 #define GCC_USB3PHY_PHY_SEC_BCR 20 macro
Dqcom,gcc-sm8250.h253 #define GCC_USB3PHY_PHY_SEC_BCR 41 macro
Dqcom,gcc-sm8350.h248 #define GCC_USB3PHY_PHY_SEC_BCR 33 macro
Dqcom,gcc-sc8180x.h280 #define GCC_USB3PHY_PHY_SEC_BCR 30 macro
/Linux-v5.15/drivers/clk/qcom/
Dgcc-sc7180.c2399 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
Dgcc-sdm845.c3529 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
Dgcc-sm8250.c3578 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
Dgcc-sm8350.c3779 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
Dgcc-sm8150.c3705 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
Dgcc-sc8180x.c4520 [GCC_USB3PHY_PHY_SEC_BCR] = { 0x5001c },
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsm8350.dtsi1252 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
Dsm8150.dtsi3042 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
Dsm8250.dtsi2329 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
Dsdm845.dtsi3731 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,