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Searched refs:vdpu_write_relaxed (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/staging/media/hantro/
Dhantro_g1_h264_dec.c50 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0); in set_params()
56 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL1); in set_params()
66 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL2); in set_params()
72 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL3); in set_params()
86 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL4); in set_params()
101 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL5); in set_params()
108 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL6); in set_params()
111 vdpu_write_relaxed(vpu, 0, G1_REG_ERR_CONC); in set_params()
114 vdpu_write_relaxed(vpu, in set_params()
121 vdpu_write_relaxed(vpu, 0, G1_REG_REF_BUF_CTRL); in set_params()
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Drk3399_vpu_hw_mpeg2_dec.c95 vdpu_write_relaxed(vpu, ctx->mpeg2_dec.qtable.dma, in rk3399_vpu_mpeg2_dec_set_quantization()
123 vdpu_write_relaxed(vpu, addr, VDPU_REG_RLC_VLC_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
131 vdpu_write_relaxed(vpu, addr, VDPU_REG_DEC_OUT_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
145 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
146 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER1_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
148 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
149 vdpu_write_relaxed(vpu, current_addr, VDPU_REG_REFER1_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
151 vdpu_write_relaxed(vpu, current_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
152 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER1_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
156 vdpu_write_relaxed(vpu, backward_addr, VDPU_REG_REFER2_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
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Dhantro_g1_mpeg2_dec.c94 vdpu_write_relaxed(vpu, ctx->mpeg2_dec.qtable.dma, in hantro_g1_mpeg2_dec_set_quantization()
121 vdpu_write_relaxed(vpu, addr, G1_REG_RLC_VLC_BASE); in hantro_g1_mpeg2_dec_set_buffers()
129 vdpu_write_relaxed(vpu, addr, G1_REG_DEC_OUT_BASE); in hantro_g1_mpeg2_dec_set_buffers()
143 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
144 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER1_BASE); in hantro_g1_mpeg2_dec_set_buffers()
146 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
147 vdpu_write_relaxed(vpu, current_addr, G1_REG_REFER1_BASE); in hantro_g1_mpeg2_dec_set_buffers()
149 vdpu_write_relaxed(vpu, current_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
150 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER1_BASE); in hantro_g1_mpeg2_dec_set_buffers()
154 vdpu_write_relaxed(vpu, backward_addr, G1_REG_REFER2_BASE); in hantro_g1_mpeg2_dec_set_buffers()
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Dhantro_g1_vp8_dec.c162 vdpu_write_relaxed(vpu, reg, G1_REG_REF_PIC(0)); in cfg_lf()
270 vdpu_write_relaxed(vpu, (mb_offset_bytes & (~DEC_8190_ALIGN_MASK)) in cfg_parts()
307 vdpu_write_relaxed(vpu, in cfg_parts()
382 vdpu_write_relaxed(vpu, ref, G1_REG_ADDR_REF(0)); in cfg_ref()
390 vdpu_write_relaxed(vpu, ref, G1_REG_ADDR_REF(4)); in cfg_ref()
398 vdpu_write_relaxed(vpu, ref, G1_REG_ADDR_REF(5)); in cfg_ref()
413 vdpu_write_relaxed(vpu, ctx->vp8_dec.prob_tbl.dma, in cfg_buffers()
423 vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(0)); in cfg_buffers()
426 vdpu_write_relaxed(vpu, dst_dma, G1_REG_ADDR_DST); in cfg_buffers()
460 vdpu_write_relaxed(vpu, reg, G1_REG_CONFIG); in hantro_g1_vp8_dec_run()
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Drk3399_vpu_hw_vp8_dec.c303 vdpu_write_relaxed(vpu, reg, VDPU_REG_FILTER_MB_ADJ); in cfg_lf()
382 vdpu_write_relaxed(vpu, (mb_offset_bytes & (~DEC_8190_ALIGN_MASK)) + in cfg_parts()
459 vdpu_write_relaxed(vpu, ref, VDPU_REG_VP8_ADDR_REF0); in cfg_ref()
467 vdpu_write_relaxed(vpu, ref, VDPU_REG_VP8_ADDR_REF2_5(2)); in cfg_ref()
475 vdpu_write_relaxed(vpu, ref, VDPU_REG_VP8_ADDR_REF2_5(3)); in cfg_ref()
490 vdpu_write_relaxed(vpu, ctx->vp8_dec.prob_tbl.dma, in cfg_buffers()
500 vdpu_write_relaxed(vpu, reg, VDPU_REG_VP8_SEGMENT_VAL); in cfg_buffers()
504 vdpu_write_relaxed(vpu, dst_dma, VDPU_REG_ADDR_DST); in cfg_buffers()
542 vdpu_write_relaxed(vpu, reg, VDPU_REG_EN_FLAGS); in rk3399_vpu_vp8_dec_run()
550 vdpu_write_relaxed(vpu, reg, VDPU_REG_DATA_ENDIAN); in rk3399_vpu_vp8_dec_run()
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Dhantro.h350 static inline void vdpu_write_relaxed(struct hantro_dev *vpu, in vdpu_write_relaxed() function
387 vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base); in hantro_reg_write()