Searched refs:pll_mux (Results 1 – 5 of 5) sorted by relevance
| /Linux-v5.10/drivers/clk/rockchip/ |
| D | clk-pll.c | 29 struct clk_mux pll_mux; member
193 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3036_pll_set_params() local
207 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3036_pll_set_params()
209 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
243 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
428 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3066_pll_set_params() local
440 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3066_pll_set_params()
442 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
478 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
675 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3399_pll_set_params() local
[all …]
|
| /Linux-v5.10/drivers/clk/socfpga/ |
| D | clk-agilex.c | 15 static const struct clk_parent_data pll_mux[] = { variable
193 { AGILEX_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
195 { AGILEX_PERIPH_PLL_CLK, "periph_pll", pll_mux, ARRAY_SIZE(pll_mux),
|
| D | clk-s10.c | 15 static const struct clk_parent_data pll_mux[] = { variable
151 { STRATIX10_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
153 { STRATIX10_PERIPH_PLL_CLK, "periph_pll", pll_mux, ARRAY_SIZE(pll_mux),
|
| /Linux-v5.10/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_10nm.c | 84 u8 pll_mux; member
549 cached->pll_mux = cmn_clk_cfg1 & 0x3; in dsi_pll_10nm_save_state()
553 cached->pix_clk_div, cached->pll_mux); in dsi_pll_10nm_save_state()
573 val |= cached->pll_mux; in dsi_pll_10nm_restore_state()
|
| D | dsi_pll_7nm.c | 84 u8 pll_mux; member
575 cached->pll_mux = cmn_clk_cfg1 & 0x3; in dsi_pll_7nm_save_state()
579 cached->pix_clk_div, cached->pll_mux); in dsi_pll_7nm_save_state()
599 val |= cached->pll_mux; in dsi_pll_7nm_restore_state()
|
