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Searched refs:phy_write_mmd (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.10/drivers/net/phy/
Dintel-xway.c162 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, in xway_gphy_config_init()
166 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCL, in xway_gphy_config_init()
179 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0H, ledxh); in xway_gphy_config_init()
180 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0L, ledxl); in xway_gphy_config_init()
181 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1H, ledxh); in xway_gphy_config_init()
182 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1L, ledxl); in xway_gphy_config_init()
183 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh); in xway_gphy_config_init()
184 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl); in xway_gphy_config_init()
Ddp83869.c238 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
244 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
250 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
262 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
268 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
273 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
298 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg); in dp83869_set_wol()
662 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode()
697 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
709 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
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Ddp83tc811.c113 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA1, in dp83811_set_wol()
115 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA2, in dp83811_set_wol()
117 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA3, in dp83811_set_wol()
128 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
131 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
134 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
148 return phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
Ddp83822.c153 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1, in dp83822_set_wol()
155 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2, in dp83822_set_wol()
157 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3, in dp83822_set_wol()
168 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
171 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
174 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
188 return phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
560 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value | in dp83822_resume()
Ddp83867.c201 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD1, in dp83867_set_wol()
203 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD2, in dp83867_set_wol()
205 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD3, in dp83867_set_wol()
214 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1, in dp83867_set_wol()
216 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP2, in dp83867_set_wol()
218 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP3, in dp83867_set_wol()
240 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG, val_rxcfg); in dp83867_set_wol()
704 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val); in dp83867_config_init()
713 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL, in dp83867_config_init()
758 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL, val); in dp83867_config_init()
Dmicrel.c391 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_config_init()
580 return phy_write_mmd(phydev, 2, reg, newval); in ksz9031_of_load_skew_values()
588 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, in ksz9031_center_flp_timing()
593 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, in ksz9031_center_flp_timing()
609 return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD, in ksz9031_enable_edpd()
647 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_CONTROL_PAD_SKEW, in ksz9031_config_rgmii_delay()
653 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_RX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
661 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_TX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
669 return phy_write_mmd(phydev, 2, MII_KSZ9031RN_CLK_PAD_SKEW, in ksz9031_config_rgmii_delay()
823 return phy_write_mmd(phydev, 2, reg, newval); in ksz9131_of_load_skew_values()
Daquantia_main.c249 err = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_MASK2, in aqr_config_intr()
254 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, in aqr_config_intr()
259 return phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, in aqr_config_intr()
Dphy-c45.c70 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); in genphy_c45_pma_setup_forced()
74 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2); in genphy_c45_pma_setup_forced()
Daquantia_hwmon.c79 return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); in aqr_hwmon_set()
Dmicrochip.c313 phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG, in lan88xx_config_init()
Dadin.c260 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode()
287 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode()
Dbcm-phy-lib.c343 phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val); in bcm_phy_set_eee()
355 phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val); in bcm_phy_set_eee()
Dphy-core.c561 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) in phy_write_mmd() function
571 EXPORT_SYMBOL(phy_write_mmd);
Dat803x.c264 phy_write_mmd(phydev, AT803X_DEVICE_ADDR, offsets[i], in at803x_set_wol()
544 return phy_write_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M, val); in at803x_clk_out_config()
Dmarvell10g.c200 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP, in mv3310_hwmon_config()
Dphy.c1399 ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in phy_ethtool_set_eee()
/Linux-v5.10/drivers/net/ethernet/realtek/
Dr8169_phy_config.c659 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0000); in rtl8168e_1_hw_phy_config()
Dr8169_main.c1940 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in rtl_enable_eee()
/Linux-v5.10/drivers/net/usb/
Dlan78xx.c2001 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf); in lan8835_fixup()
2021 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077); in ksz9031rnx_fixup()
2023 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777); in ksz9031rnx_fixup()
2025 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF); in ksz9031rnx_fixup()
/Linux-v5.10/include/linux/
Dphy.h1064 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);