| /Linux-v5.10/drivers/net/phy/ |
| D | phy-c45.c | 23 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced() 27 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); in genphy_c45_pma_setup_forced() 174 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_check_and_restart_aneg() 202 int val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_aneg_done() 223 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link() 246 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 253 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 281 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa() 300 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); in genphy_c45_read_lpa() 309 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_lpa() [all …]
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| D | bcm84881.c | 117 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_aneg_done() 121 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_aneg_done() 134 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status() 143 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_read_status() 147 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_read_status() 173 val = phy_read_mmd(phydev, MDIO_MMD_AN, in bcm84881_read_status() 197 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
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| D | teranetics.c | 39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done() 54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status() 55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status() 62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
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| D | aquantia_main.c | 171 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat() 177 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat() 268 reg = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_ack_interrupt() 278 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status() 297 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); in aqr107_read_rate() 344 val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS); in aqr107_read_status() 377 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift() 449 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info() 456 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); in aqr107_chip_info() 523 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr107_link_change_notify() [all …]
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| D | marvell10g.c | 116 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg() 121 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg() 293 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd() 374 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe() 390 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe() 396 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER1); in mv3310_probe() 477 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL); in mv3310_config_init() 496 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features() 577 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_STAT1); in mv3310_aneg_done() 646 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in mv3310_read_status_copper() [all …]
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| D | dp83tc811.c | 120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol() 172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 317 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
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| D | dp83822.c | 160 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 205 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol() 211 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 216 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 221 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 500 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1); in dp83822_read_straps() 544 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend() 558 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
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| D | dp83867.c | 187 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_set_wol() 255 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_get_wol() 267 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 272 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 277 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 455 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_verify_rgmii_cfg() 627 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_config_init() 677 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init() 692 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init() 749 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL); in dp83867_config_init()
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| D | dp83869.c | 218 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol() 314 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol() 330 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 340 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 350 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 479 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode() 532 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init() 787 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
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| D | microchip.c | 250 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe() 251 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe() 309 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
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| D | phy.c | 1272 eee_cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_init_eee() 1283 eee_lp = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in phy_init_eee() 1287 eee_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_init_eee() 1324 return phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_WK_ERR); in phy_get_eee_err() 1344 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_ethtool_get_eee() 1350 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_ethtool_get_eee() 1357 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in phy_ethtool_get_eee() 1383 cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_ethtool_set_eee() 1387 old_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_ethtool_set_eee()
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| D | adin.c | 228 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode() 274 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode() 631 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 658 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs() 667 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs()
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| D | aquantia_hwmon.c | 58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get() 84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
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| D | bcm-phy-lib.c | 334 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL); in bcm_phy_set_eee() 346 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV); in bcm_phy_set_eee()
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| D | phy-core.c | 502 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in phy_read_mmd() function 512 EXPORT_SYMBOL(phy_read_mmd);
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| D | micrel.c | 566 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values() 606 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd() 809 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values()
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| D | at803x.c | 537 val = phy_read_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M); in at803x_clk_out_config()
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| /Linux-v5.10/include/linux/ |
| D | phy.h | 1021 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1044 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
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| /Linux-v5.10/drivers/net/ethernet/realtek/ |
| D | r8169_main.c | 1901 tp->eee_adv = phy_read_mmd(dev->phydev, MDIO_MMD_AN, in rtl8169_set_eee() 1937 adv = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in rtl_enable_eee()
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| /Linux-v5.10/drivers/net/usb/ |
| D | lan78xx.c | 1998 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010); in lan8835_fixup()
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