Home
last modified time | relevance | path

Searched refs:mmSQ_IND_INDEX (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1437 #define mmSQ_IND_INDEX 0x2378 macro
Dgfx_7_0_d.h1899 #define mmSQ_IND_INDEX 0x2378 macro
Dgfx_7_2_d.h1920 #define mmSQ_IND_INDEX 0x2378 macro
Dgfx_8_0_d.h2119 #define mmSQ_IND_INDEX 0x2378 macro
Dgfx_8_1_d.h2087 #define mmSQ_IND_INDEX 0x2378 macro
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2984 WREG32(mmSQ_IND_INDEX, in wave_read_ind()
2996 WREG32(mmSQ_IND_INDEX, in wave_read_regs()
Dgfx_v7_0.c4151 WREG32(mmSQ_IND_INDEX, in wave_read_ind()
4163 WREG32(mmSQ_IND_INDEX, in wave_read_regs()
Dgfx_v9_0.c707 {SOC15_REG_ENTRY(GC, 0, mmSQ_IND_INDEX)},
1998 WREG32_SOC15_RLC(GC, 0, mmSQ_IND_INDEX, in wave_read_ind()
2010 WREG32_SOC15_RLC(GC, 0, mmSQ_IND_INDEX, in wave_read_regs()
Dgfx_v8_0.c5228 WREG32(mmSQ_IND_INDEX, in wave_read_ind()
5240 WREG32(mmSQ_IND_INDEX, in wave_read_regs()
Dgfx_v10_0.c4142 WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, in wave_read_ind()
4152 WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, in wave_read_regs()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h459 #define mmSQ_IND_INDEX macro
Dgc_9_1_offset.h453 #define mmSQ_IND_INDEX macro
Dgc_9_2_1_offset.h443 #define mmSQ_IND_INDEX macro
Dgc_10_1_0_offset.h2529 #define mmSQ_IND_INDEX macro
Dgc_10_3_0_offset.h2618 #define mmSQ_IND_INDEX macro