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Searched refs:mmRLC_CGTT_MGCG_OVERRIDE (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_vi.c47 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
138 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
Dsi.c426 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
555 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
653 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
753 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
833 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
Dgfx_v8_0.c230 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
433 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
504 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
600 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
5476 data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_get_clockgating_state()
5664 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5676 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5705 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5711 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5759 temp1 = data1 = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_coarse_grain_clock_gating()
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Dgfx_v9_0.c4783 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4796 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
4817 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4828 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
4861 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_3d_clock_gating()
4866 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_3d_clock_gating()
4907 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_coarse_grain_clock_gating()
4916 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_coarse_grain_clock_gating()
5118 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_0_get_clockgating_state()
Dgfx_v6_0.c2619 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2622 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
2632 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2635 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
Dgfx_v7_0.c3638 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3642 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
3673 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3676 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
Dgfx_v10_0.c7351 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7358 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7379 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7385 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7412 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_3d_clock_gating()
7417 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_3d_clock_gating()
7452 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_coarse_grain_clock_gating()
7461 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_coarse_grain_clock_gating()
7655 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v10_0_get_clockgating_state()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1135 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3100 macro
Dgfx_7_0_d.h1280 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
Dgfx_7_2_d.h1293 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
Dgfx_8_0_d.h1391 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
Dgfx_8_1_d.h1393 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6043 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_9_1_offset.h6265 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_9_2_1_offset.h6241 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_10_1_0_offset.h9363 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_10_3_0_offset.h9187 #define mmRLC_CGTT_MGCG_OVERRIDE … macro