Searched refs:me_hdr (Results 1 – 6 of 6) sorted by relevance
2454 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v7_0_cp_gfx_load_microcode() local2463 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v7_0_cp_gfx_load_microcode()2467 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v7_0_cp_gfx_load_microcode()2470 adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); in gfx_v7_0_cp_gfx_load_microcode()2471 adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); in gfx_v7_0_cp_gfx_load_microcode()2500 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_gfx_load_microcode()2501 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_gfx_load_microcode()
1970 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v6_0_cp_gfx_load_microcode() local1980 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_cp_gfx_load_microcode()1984 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v6_0_cp_gfx_load_microcode()2006 (adev->gfx.me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v6_0_cp_gfx_load_microcode()2007 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v6_0_cp_gfx_load_microcode()
5650 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v10_0_cp_gfx_load_me_microcode() local5656 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_cp_gfx_load_me_microcode()5659 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v10_0_cp_gfx_load_me_microcode()5662 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_gfx_load_me_microcode()5663 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes); in gfx_v10_0_cp_gfx_load_me_microcode()5665 r = amdgpu_bo_create_reserved(adev, me_hdr->header.ucode_size_bytes, in gfx_v10_0_cp_gfx_load_me_microcode()5715 for (i = 0; i < me_hdr->jt_size; i++) in gfx_v10_0_cp_gfx_load_me_microcode()5717 le32_to_cpup(fw_data + me_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_me_microcode()
3127 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v9_0_cp_gfx_load_microcode() local3138 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v9_0_cp_gfx_load_microcode()3143 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v9_0_cp_gfx_load_microcode()3170 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_gfx_load_microcode()3171 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_cp_gfx_load_microcode()
3908 const struct gfx_firmware_header_v1_0 *me_hdr = in cik_cp_gfx_load_microcode() local3915 radeon_ucode_print_gfx_hdr(&me_hdr->header); in cik_cp_gfx_load_microcode()3937 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in cik_cp_gfx_load_microcode()3938 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in cik_cp_gfx_load_microcode()3942 WREG32(CP_ME_RAM_WADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()3943 WREG32(CP_ME_RAM_RADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()
3494 const struct gfx_firmware_header_v1_0 *me_hdr = in si_cp_load_microcode() local3501 radeon_ucode_print_gfx_hdr(&me_hdr->header); in si_cp_load_microcode()3523 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in si_cp_load_microcode()3524 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in si_cp_load_microcode()
